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ALSA: fireface: add support for Fireface 400
Fireface 400 is a second model of RME Fireface series, released in 2006. This commit adds support for this model. This model supports 8 analog channels, 2 S/PDIF channels and 8 ADAT channels in both of tx/rx packet. The number of ADAT channels differs depending on each mode of sampling transmission frequency. $ python2 linux-firewire-utils/src/crpp < /sys/bus/firewire/devices/fw1/config_rom ROM header and bus information block ----------------------------------------------------------------- 400 0410776 bus_info_length 4, crc_length 16, crc 30568 (should be 61311) 404 31333934 bus_name "1394" 408 20009002 irmc 0, cmc 0, isc 1, bmc 0, cyc_clk_acc 0, max_rec 9 (1024) 40c 000a3501 company_id 000a35 | 410 1bd0862a device_id 011bd0862a | EUI-64 000a35011bd0862a root directory ----------------------------------------------------------------- 414 000485ec directory_length 4, crc 34284 418 03000a35 vendor 41c 0c0083c0 node capabilities per IEEE 1394 420 8d000006 --> eui-64 leaf at 438 424 d1000001 --> unit directory at 428 unit directory at 428 ----------------------------------------------------------------- 428 000314c4 directory_length 3, crc 5316 42c 12000a35 specifier id 430 13000002 version 434 17101800 model eui-64 leaf at 438 ----------------------------------------------------------------- 438 000261a8 leaf_length 2, crc 25000 43c 000a3501 company_id 000a35 | 440 1bd0862a device_id 011bd0862a | EUI-64 000a35011bd0862a Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de>
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‎sound/firewire/Kconfig

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@@ -158,5 +158,6 @@ config SND_FIREFACE
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select SND_HWDEP
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help
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Say Y here to include support for RME fireface series.
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* Fireface 400
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endif # SND_FIREWIRE

‎sound/firewire/fireface/Makefile

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@@ -1,3 +1,3 @@
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snd-fireface-objs := ff.o ff-transaction.o ff-midi.o ff-proc.o amdtp-ff.o \
2-
ff-stream.o ff-pcm.o ff-hwdep.o
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ff-stream.o ff-pcm.o ff-hwdep.o ff-protocol-ff400.o
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obj-$(CONFIG_SND_FIREFACE) += snd-fireface.o

‎sound/firewire/fireface/ff-protocol-ff400.c

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@@ -0,0 +1,371 @@
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/*
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* ff-protocol-ff400.c - a part of driver for RME Fireface series
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*
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* Copyright (c) 2015-2017 Takashi Sakamoto
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*
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* Licensed under the terms of the GNU General Public License, version 2.
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*/
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#include <linux/delay.h>
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#include "ff.h"
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#define FF400_STF 0x000080100500ull
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#define FF400_RX_PACKET_FORMAT 0x000080100504ull
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#define FF400_ISOC_COMM_START 0x000080100508ull
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#define FF400_TX_PACKET_FORMAT 0x00008010050cull
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#define FF400_ISOC_COMM_STOP 0x000080100510ull
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#define FF400_SYNC_STATUS 0x0000801c0000ull
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#define FF400_FETCH_PCM_FRAMES 0x0000801c0000ull /* For block request. */
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#define FF400_CLOCK_CONFIG 0x0000801c0004ull
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#define FF400_MIDI_HIGH_ADDR 0x0000801003f4ull
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#define FF400_MIDI_RX_PORT_0 0x000080180000ull
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#define FF400_MIDI_RX_PORT_1 0x000080190000ull
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static int ff400_get_clock(struct snd_ff *ff, unsigned int *rate,
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enum snd_ff_clock_src *src)
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{
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__le32 reg;
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u32 data;
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int err;
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err = snd_fw_transaction(ff->unit, TCODE_READ_QUADLET_REQUEST,
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FF400_SYNC_STATUS, &reg, sizeof(reg), 0);
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if (err < 0)
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return err;
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data = le32_to_cpu(reg);
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/* Calculate sampling rate. */
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switch ((data >> 1) & 0x03) {
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case 0x01:
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*rate = 32000;
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break;
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case 0x00:
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*rate = 44100;
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break;
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case 0x03:
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*rate = 48000;
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break;
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case 0x02:
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default:
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return -EIO;
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}
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if (data & 0x08)
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*rate *= 2;
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else if (data & 0x10)
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*rate *= 4;
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/* Calculate source of clock. */
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if (data & 0x01) {
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*src = SND_FF_CLOCK_SRC_INTERNAL;
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} else {
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/* TODO: 0x00, 0x01, 0x02, 0x06, 0x07? */
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switch ((data >> 10) & 0x07) {
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case 0x03:
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*src = SND_FF_CLOCK_SRC_SPDIF;
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break;
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case 0x04:
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*src = SND_FF_CLOCK_SRC_WORD;
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break;
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case 0x05:
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*src = SND_FF_CLOCK_SRC_LTC;
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break;
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case 0x00:
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default:
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*src = SND_FF_CLOCK_SRC_ADAT;
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break;
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}
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}
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return 0;
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}
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static int ff400_begin_session(struct snd_ff *ff, unsigned int rate)
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{
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__le32 reg;
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int i, err;
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/* Check whether the given value is supported or not. */
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for (i = 0; i < CIP_SFC_COUNT; i++) {
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if (amdtp_rate_table[i] == rate)
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break;
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}
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if (i == CIP_SFC_COUNT)
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return -EINVAL;
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/* Set the number of data blocks transferred in a second. */
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reg = cpu_to_le32(rate);
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err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
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FF400_STF, &reg, sizeof(reg), 0);
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if (err < 0)
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return err;
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msleep(100);
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/*
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* Set isochronous channel and the number of quadlets of received
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* packets.
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*/
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reg = cpu_to_le32(((ff->rx_stream.data_block_quadlets << 3) << 8) |
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ff->rx_resources.channel);
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err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
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FF400_RX_PACKET_FORMAT, &reg, sizeof(reg), 0);
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if (err < 0)
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return err;
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/*
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* Set isochronous channel and the number of quadlets of transmitted
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* packet.
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*/
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/* TODO: investigate the purpose of this 0x80. */
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reg = cpu_to_le32((0x80 << 24) |
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(ff->tx_resources.channel << 5) |
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(ff->tx_stream.data_block_quadlets));
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err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
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FF400_TX_PACKET_FORMAT, &reg, sizeof(reg), 0);
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if (err < 0)
128+
return err;
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/* Allow to transmit packets. */
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reg = cpu_to_le32(0x00000001);
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return snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
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FF400_ISOC_COMM_START, &reg, sizeof(reg), 0);
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}
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static void ff400_finish_session(struct snd_ff *ff)
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{
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__le32 reg;
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reg = cpu_to_le32(0x80000000);
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snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
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FF400_ISOC_COMM_STOP, &reg, sizeof(reg), 0);
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}
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static int ff400_switch_fetching_mode(struct snd_ff *ff, bool enable)
146+
{
147+
__le32 *reg;
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int i;
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reg = kzalloc(sizeof(__le32) * 18, GFP_KERNEL);
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if (reg == NULL)
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return -ENOMEM;
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if (enable) {
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/*
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* Each quadlet is corresponding to data channels in a data
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* blocks in reverse order. Precisely, quadlets for available
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* data channels should be enabled. Here, I take second best
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* to fetch PCM frames from all of data channels regardless of
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* stf.
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*/
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for (i = 0; i < 18; ++i)
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reg[i] = cpu_to_le32(0x00000001);
164+
}
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166+
return snd_fw_transaction(ff->unit, TCODE_WRITE_BLOCK_REQUEST,
167+
FF400_FETCH_PCM_FRAMES, reg,
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sizeof(__le32) * 18, 0);
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}
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static void ff400_dump_sync_status(struct snd_ff *ff,
172+
struct snd_info_buffer *buffer)
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{
174+
__le32 reg;
175+
u32 data;
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int err;
177+
178+
err = snd_fw_transaction(ff->unit, TCODE_READ_QUADLET_REQUEST,
179+
FF400_SYNC_STATUS, &reg, sizeof(reg), 0);
180+
if (err < 0)
181+
return;
182+
183+
data = le32_to_cpu(reg);
184+
185+
snd_iprintf(buffer, "External source detection:\n");
186+
187+
snd_iprintf(buffer, "Word Clock:");
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if ((data >> 24) & 0x20) {
189+
if ((data >> 24) & 0x40)
190+
snd_iprintf(buffer, "sync\n");
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else
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snd_iprintf(buffer, "lock\n");
193+
} else {
194+
snd_iprintf(buffer, "none\n");
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}
196+
197+
snd_iprintf(buffer, "S/PDIF:");
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if ((data >> 16) & 0x10) {
199+
if ((data >> 16) & 0x04)
200+
snd_iprintf(buffer, "sync\n");
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else
202+
snd_iprintf(buffer, "lock\n");
203+
} else {
204+
snd_iprintf(buffer, "none\n");
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}
206+
207+
snd_iprintf(buffer, "ADAT:");
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if ((data >> 8) & 0x04) {
209+
if ((data >> 8) & 0x10)
210+
snd_iprintf(buffer, "sync\n");
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else
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snd_iprintf(buffer, "lock\n");
213+
} else {
214+
snd_iprintf(buffer, "none\n");
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}
216+
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snd_iprintf(buffer, "\nUsed external source:\n");
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219+
if (((data >> 22) & 0x07) == 0x07) {
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snd_iprintf(buffer, "None\n");
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} else {
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switch ((data >> 22) & 0x07) {
223+
case 0x00:
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snd_iprintf(buffer, "ADAT:");
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break;
226+
case 0x03:
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snd_iprintf(buffer, "S/PDIF:");
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break;
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case 0x04:
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snd_iprintf(buffer, "Word:");
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break;
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case 0x07:
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snd_iprintf(buffer, "Nothing:");
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break;
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case 0x01:
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case 0x02:
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case 0x05:
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case 0x06:
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default:
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snd_iprintf(buffer, "unknown:");
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break;
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}
243+
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if ((data >> 25) & 0x07) {
245+
switch ((data >> 25) & 0x07) {
246+
case 0x01:
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snd_iprintf(buffer, "32000\n");
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break;
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case 0x02:
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snd_iprintf(buffer, "44100\n");
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break;
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case 0x03:
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snd_iprintf(buffer, "48000\n");
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break;
255+
case 0x04:
256+
snd_iprintf(buffer, "64000\n");
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break;
258+
case 0x05:
259+
snd_iprintf(buffer, "88200\n");
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break;
261+
case 0x06:
262+
snd_iprintf(buffer, "96000\n");
263+
break;
264+
case 0x07:
265+
snd_iprintf(buffer, "128000\n");
266+
break;
267+
case 0x08:
268+
snd_iprintf(buffer, "176400\n");
269+
break;
270+
case 0x09:
271+
snd_iprintf(buffer, "192000\n");
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break;
273+
case 0x00:
274+
snd_iprintf(buffer, "unknown\n");
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break;
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}
277+
}
278+
}
279+
280+
snd_iprintf(buffer, "Multiplied:");
281+
snd_iprintf(buffer, "%d\n", (data & 0x3ff) * 250);
282+
}
283+
284+
static void ff400_dump_clock_config(struct snd_ff *ff,
285+
struct snd_info_buffer *buffer)
286+
{
287+
__le32 reg;
288+
u32 data;
289+
unsigned int rate;
290+
const char *src;
291+
int err;
292+
293+
err = snd_fw_transaction(ff->unit, TCODE_READ_BLOCK_REQUEST,
294+
FF400_CLOCK_CONFIG, &reg, sizeof(reg), 0);
295+
if (err < 0)
296+
return;
297+
298+
data = le32_to_cpu(reg);
299+
300+
snd_iprintf(buffer, "Output S/PDIF format: %s (Emphasis: %s)\n",
301+
(data & 0x20) ? "Professional" : "Consumer",
302+
(data & 0x40) ? "on" : "off");
303+
304+
snd_iprintf(buffer, "Optical output interface format: %s\n",
305+
((data >> 8) & 0x01) ? "S/PDIF" : "ADAT");
306+
307+
snd_iprintf(buffer, "Word output single speed: %s\n",
308+
((data >> 8) & 0x20) ? "on" : "off");
309+
310+
snd_iprintf(buffer, "S/PDIF input interface: %s\n",
311+
((data >> 8) & 0x02) ? "Optical" : "Coaxial");
312+
313+
switch ((data >> 1) & 0x03) {
314+
case 0x01:
315+
rate = 32000;
316+
break;
317+
case 0x00:
318+
rate = 44100;
319+
break;
320+
case 0x03:
321+
rate = 48000;
322+
break;
323+
case 0x02:
324+
default:
325+
return;
326+
}
327+
328+
if (data & 0x08)
329+
rate *= 2;
330+
else if (data & 0x10)
331+
rate *= 4;
332+
333+
snd_iprintf(buffer, "Sampling rate: %d\n", rate);
334+
335+
if (data & 0x01) {
336+
src = "Internal";
337+
} else {
338+
switch ((data >> 10) & 0x07) {
339+
case 0x00:
340+
src = "ADAT";
341+
break;
342+
case 0x03:
343+
src = "S/PDIF";
344+
break;
345+
case 0x04:
346+
src = "Word";
347+
break;
348+
case 0x05:
349+
src = "LTC";
350+
break;
351+
default:
352+
return;
353+
}
354+
}
355+
356+
snd_iprintf(buffer, "Sync to clock source: %s\n", src);
357+
}
358+
359+
struct snd_ff_protocol snd_ff_protocol_ff400 = {
360+
.get_clock = ff400_get_clock,
361+
.begin_session = ff400_begin_session,
362+
.finish_session = ff400_finish_session,
363+
.switch_fetching_mode = ff400_switch_fetching_mode,
364+
365+
.dump_sync_status = ff400_dump_sync_status,
366+
.dump_clock_config = ff400_dump_clock_config,
367+
368+
.midi_high_addr_reg = FF400_MIDI_HIGH_ADDR,
369+
.midi_rx_port_0_reg = FF400_MIDI_RX_PORT_0,
370+
.midi_rx_port_1_reg = FF400_MIDI_RX_PORT_1,
371+
};

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