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lines changed Original file line number Diff line number Diff line change @@ -6084,6 +6084,7 @@ enum skl_disp_power_wells {
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# define GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC ((1<<10) | (1<<26))
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# define GEN9_RHWO_OPTIMIZATION_DISABLE (1<<14)
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#define COMMON_SLICE_CHICKEN2 _MMIO(0x7014)
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+ # define GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION (1<<8)
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# define GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE (1<<0)
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#define HIZ_CHICKEN _MMIO(0x7018)
Original file line number Diff line number Diff line change @@ -1186,6 +1186,11 @@ static int bxt_init_workarounds(struct intel_engine_cs *engine)
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return ret ;
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}
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+ /* WaInsertDummyPushConstPs:bxt */
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+ if (IS_BXT_REVID (dev_priv , 0 , BXT_REVID_B0 ))
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+ WA_SET_BIT_MASKED (COMMON_SLICE_CHICKEN2 ,
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+ GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION );
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+
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return 0 ;
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}
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@@ -1220,6 +1225,11 @@ static int kbl_init_workarounds(struct intel_engine_cs *engine)
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I915_WRITE (GEN8_L3SQCREG4 , I915_READ (GEN8_L3SQCREG4 ) |
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GEN8_LQSC_RO_PERF_DIS );
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+ /* WaInsertDummyPushConstPs:kbl */
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+ if (IS_KBL_REVID (dev_priv , 0 , KBL_REVID_B0 ))
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+ WA_SET_BIT_MASKED (COMMON_SLICE_CHICKEN2 ,
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+ GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION );
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+
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/* WaDisableLSQCROPERFforOCL:kbl */
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ret = wa_ring_whitelist_reg (engine , GEN8_L3SQCREG4 );
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if (ret )
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