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Commit 7ddb937

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Abhishek Sahumiquelraynal
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mtd: rawnand: qcom: use the ecc strength from device parameter
Currently the driver uses the ECC strength specified in DT. The QPIC/EBI2 NAND supports 4 or 8-bit ECC correction. The same kind of board can have different NAND parts so use the ECC strength from device parameters if it is not specified in DT. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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drivers/mtd/nand/raw/qcom_nandc.c

Lines changed: 21 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -2315,19 +2315,39 @@ static const struct mtd_ooblayout_ops qcom_nand_ooblayout_ops = {
23152315
.free = qcom_nand_ooblayout_free,
23162316
};
23172317

2318+
static int
2319+
qcom_nandc_calc_ecc_bytes(int step_size, int strength)
2320+
{
2321+
return strength == 4 ? 12 : 16;
2322+
}
2323+
NAND_ECC_CAPS_SINGLE(qcom_nandc_ecc_caps, qcom_nandc_calc_ecc_bytes,
2324+
NANDC_STEP_SIZE, 4, 8);
2325+
23182326
static int qcom_nand_host_setup(struct qcom_nand_host *host)
23192327
{
23202328
struct nand_chip *chip = &host->chip;
23212329
struct mtd_info *mtd = nand_to_mtd(chip);
23222330
struct nand_ecc_ctrl *ecc = &chip->ecc;
23232331
struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
2324-
int cwperpage, bad_block_byte;
2332+
int cwperpage, bad_block_byte, ret;
23252333
bool wide_bus;
23262334
int ecc_mode = 1;
23272335

23282336
/* controller only supports 512 bytes data steps */
23292337
ecc->size = NANDC_STEP_SIZE;
23302338
wide_bus = chip->options & NAND_BUSWIDTH_16 ? true : false;
2339+
cwperpage = mtd->writesize / NANDC_STEP_SIZE;
2340+
2341+
/*
2342+
* Each CW has 4 available OOB bytes which will be protected with ECC
2343+
* so remaining bytes can be used for ECC.
2344+
*/
2345+
ret = nand_ecc_choose_conf(chip, &qcom_nandc_ecc_caps,
2346+
mtd->oobsize - (cwperpage * 4));
2347+
if (ret) {
2348+
dev_err(nandc->dev, "No valid ECC settings possible\n");
2349+
return ret;
2350+
}
23312351

23322352
if (ecc->strength >= 8) {
23332353
/* 8 bit ECC defaults to BCH ECC on all platforms */
@@ -2396,7 +2416,6 @@ static int qcom_nand_host_setup(struct qcom_nand_host *host)
23962416

23972417
mtd_set_ooblayout(mtd, &qcom_nand_ooblayout_ops);
23982418

2399-
cwperpage = mtd->writesize / ecc->size;
24002419
nandc->max_cwperpage = max_t(unsigned int, nandc->max_cwperpage,
24012420
cwperpage);
24022421

@@ -2412,12 +2431,6 @@ static int qcom_nand_host_setup(struct qcom_nand_host *host)
24122431
* for 8 bit ECC
24132432
*/
24142433
host->cw_size = host->cw_data + ecc->bytes;
2415-
2416-
if (ecc->bytes * (mtd->writesize / ecc->size) > mtd->oobsize) {
2417-
dev_err(nandc->dev, "ecc data doesn't fit in OOB area\n");
2418-
return -EINVAL;
2419-
}
2420-
24212434
bad_block_byte = mtd->writesize - host->cw_size * (cwperpage - 1) + 1;
24222435

24232436
host->cfg0 = (cwperpage - 1) << CW_PER_PAGE

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