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torvaldstorvalds
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Merge branch 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: perf_event, powerpc: Fix compilation after big perf_counter rename
2 parents 991d79b + a8f90e9 commit 7fa0772

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2 files changed

+21
-21
lines changed

2 files changed

+21
-21
lines changed

‎arch/powerpc/include/asm/perf_event.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -14,15 +14,15 @@
1414

1515
#define MAX_HWEVENTS 8
1616
#define MAX_EVENT_ALTERNATIVES 8
17-
#define MAX_LIMITED_HWEVENTS 2
17+
#define MAX_LIMITED_HWCOUNTERS 2
1818

1919
/*
2020
* This struct provides the constants and functions needed to
2121
* describe the PMU on a particular POWER-family CPU.
2222
*/
2323
struct power_pmu {
2424
const char *name;
25-
int n_event;
25+
int n_counter;
2626
int max_alternatives;
2727
unsigned long add_fields;
2828
unsigned long test_adder;

‎arch/powerpc/kernel/perf_event.c

Lines changed: 19 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -30,8 +30,8 @@ struct cpu_hw_events {
3030
u64 events[MAX_HWEVENTS];
3131
unsigned int flags[MAX_HWEVENTS];
3232
unsigned long mmcr[3];
33-
struct perf_event *limited_event[MAX_LIMITED_HWEVENTS];
34-
u8 limited_hwidx[MAX_LIMITED_HWEVENTS];
33+
struct perf_event *limited_counter[MAX_LIMITED_HWCOUNTERS];
34+
u8 limited_hwidx[MAX_LIMITED_HWCOUNTERS];
3535
u64 alternatives[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES];
3636
unsigned long amasks[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES];
3737
unsigned long avalues[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES];
@@ -253,7 +253,7 @@ static int power_check_constraints(struct cpu_hw_events *cpuhw,
253253
unsigned long addf = ppmu->add_fields;
254254
unsigned long tadd = ppmu->test_adder;
255255

256-
if (n_ev > ppmu->n_event)
256+
if (n_ev > ppmu->n_counter)
257257
return -1;
258258

259259
/* First see if the events will go on as-is */
@@ -426,15 +426,15 @@ static int is_limited_pmc(int pmcnum)
426426
&& (pmcnum == 5 || pmcnum == 6);
427427
}
428428

429-
static void freeze_limited_events(struct cpu_hw_events *cpuhw,
429+
static void freeze_limited_counters(struct cpu_hw_events *cpuhw,
430430
unsigned long pmc5, unsigned long pmc6)
431431
{
432432
struct perf_event *event;
433433
u64 val, prev, delta;
434434
int i;
435435

436436
for (i = 0; i < cpuhw->n_limited; ++i) {
437-
event = cpuhw->limited_event[i];
437+
event = cpuhw->limited_counter[i];
438438
if (!event->hw.idx)
439439
continue;
440440
val = (event->hw.idx == 5) ? pmc5 : pmc6;
@@ -445,15 +445,15 @@ static void freeze_limited_events(struct cpu_hw_events *cpuhw,
445445
}
446446
}
447447

448-
static void thaw_limited_events(struct cpu_hw_events *cpuhw,
448+
static void thaw_limited_counters(struct cpu_hw_events *cpuhw,
449449
unsigned long pmc5, unsigned long pmc6)
450450
{
451451
struct perf_event *event;
452452
u64 val;
453453
int i;
454454

455455
for (i = 0; i < cpuhw->n_limited; ++i) {
456-
event = cpuhw->limited_event[i];
456+
event = cpuhw->limited_counter[i];
457457
event->hw.idx = cpuhw->limited_hwidx[i];
458458
val = (event->hw.idx == 5) ? pmc5 : pmc6;
459459
atomic64_set(&event->hw.prev_count, val);
@@ -495,9 +495,9 @@ static void write_mmcr0(struct cpu_hw_events *cpuhw, unsigned long mmcr0)
495495
"i" (SPRN_PMC5), "i" (SPRN_PMC6));
496496

497497
if (mmcr0 & MMCR0_FC)
498-
freeze_limited_events(cpuhw, pmc5, pmc6);
498+
freeze_limited_counters(cpuhw, pmc5, pmc6);
499499
else
500-
thaw_limited_events(cpuhw, pmc5, pmc6);
500+
thaw_limited_counters(cpuhw, pmc5, pmc6);
501501

502502
/*
503503
* Write the full MMCR0 including the event overflow interrupt
@@ -653,7 +653,7 @@ void hw_perf_enable(void)
653653
continue;
654654
idx = hwc_index[i] + 1;
655655
if (is_limited_pmc(idx)) {
656-
cpuhw->limited_event[n_lim] = event;
656+
cpuhw->limited_counter[n_lim] = event;
657657
cpuhw->limited_hwidx[n_lim] = idx;
658658
++n_lim;
659659
continue;
@@ -702,7 +702,7 @@ static int collect_events(struct perf_event *group, int max_count,
702702
flags[n] = group->hw.event_base;
703703
events[n++] = group->hw.config;
704704
}
705-
list_for_each_entry(event, &group->sibling_list, list_entry) {
705+
list_for_each_entry(event, &group->sibling_list, group_entry) {
706706
if (!is_software_event(event) &&
707707
event->state != PERF_EVENT_STATE_OFF) {
708708
if (n >= max_count)
@@ -742,7 +742,7 @@ int hw_perf_group_sched_in(struct perf_event *group_leader,
742742
return 0;
743743
cpuhw = &__get_cpu_var(cpu_hw_events);
744744
n0 = cpuhw->n_events;
745-
n = collect_events(group_leader, ppmu->n_event - n0,
745+
n = collect_events(group_leader, ppmu->n_counter - n0,
746746
&cpuhw->event[n0], &cpuhw->events[n0],
747747
&cpuhw->flags[n0]);
748748
if (n < 0)
@@ -764,7 +764,7 @@ int hw_perf_group_sched_in(struct perf_event *group_leader,
764764
cpuctx->active_oncpu += n;
765765
n = 1;
766766
event_sched_in(group_leader, cpu);
767-
list_for_each_entry(sub, &group_leader->sibling_list, list_entry) {
767+
list_for_each_entry(sub, &group_leader->sibling_list, group_entry) {
768768
if (sub->state != PERF_EVENT_STATE_OFF) {
769769
event_sched_in(sub, cpu);
770770
++n;
@@ -797,7 +797,7 @@ static int power_pmu_enable(struct perf_event *event)
797797
*/
798798
cpuhw = &__get_cpu_var(cpu_hw_events);
799799
n0 = cpuhw->n_events;
800-
if (n0 >= ppmu->n_event)
800+
if (n0 >= ppmu->n_counter)
801801
goto out;
802802
cpuhw->event[n0] = event;
803803
cpuhw->events[n0] = event->hw.config;
@@ -848,11 +848,11 @@ static void power_pmu_disable(struct perf_event *event)
848848
}
849849
}
850850
for (i = 0; i < cpuhw->n_limited; ++i)
851-
if (event == cpuhw->limited_event[i])
851+
if (event == cpuhw->limited_counter[i])
852852
break;
853853
if (i < cpuhw->n_limited) {
854854
while (++i < cpuhw->n_limited) {
855-
cpuhw->limited_event[i-1] = cpuhw->limited_event[i];
855+
cpuhw->limited_counter[i-1] = cpuhw->limited_counter[i];
856856
cpuhw->limited_hwidx[i-1] = cpuhw->limited_hwidx[i];
857857
}
858858
--cpuhw->n_limited;
@@ -1078,7 +1078,7 @@ const struct pmu *hw_perf_event_init(struct perf_event *event)
10781078
*/
10791079
n = 0;
10801080
if (event->group_leader != event) {
1081-
n = collect_events(event->group_leader, ppmu->n_event - 1,
1081+
n = collect_events(event->group_leader, ppmu->n_counter - 1,
10821082
ctrs, events, cflags);
10831083
if (n < 0)
10841084
return ERR_PTR(-EINVAL);
@@ -1230,7 +1230,7 @@ static void perf_event_interrupt(struct pt_regs *regs)
12301230
int nmi;
12311231

12321232
if (cpuhw->n_limited)
1233-
freeze_limited_events(cpuhw, mfspr(SPRN_PMC5),
1233+
freeze_limited_counters(cpuhw, mfspr(SPRN_PMC5),
12341234
mfspr(SPRN_PMC6));
12351235

12361236
perf_read_regs(regs);
@@ -1260,7 +1260,7 @@ static void perf_event_interrupt(struct pt_regs *regs)
12601260
* Any that we processed in the previous loop will not be negative.
12611261
*/
12621262
if (!found) {
1263-
for (i = 0; i < ppmu->n_event; ++i) {
1263+
for (i = 0; i < ppmu->n_counter; ++i) {
12641264
if (is_limited_pmc(i + 1))
12651265
continue;
12661266
val = read_pmc(i + 1);

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