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krzkEduardo Valentin
krzk
authored and
Eduardo Valentin
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thermal: samsung: Remove support for Exynos5440
The Exynos5440 is not actively developed, there are no development boards available and probably there are no real products with it. Remove wide-tree support for Exynos5440. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> [b.zolnierkie: ported over driver changes] Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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‎Documentation/devicetree/bindings/thermal/exynos-thermal.txt

Lines changed: 1 addition & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,6 @@
1212
"samsung,exynos5420-tmu-ext-triminfo" for TMU channels 2, 3 and 4
1313
Exynos5420 (Must pass triminfo base and triminfo clock)
1414
"samsung,exynos5433-tmu"
15-
"samsung,exynos5440-tmu"
1615
"samsung,exynos7-tmu"
1716
- interrupt-parent : The phandle for the interrupt controller
1817
- reg : Address range of the thermal registers. For soc's which has multiple
@@ -68,18 +67,7 @@ Example 1):
6867
#thermal-sensor-cells = <0>;
6968
};
7069

71-
Example 2):
72-
73-
tmuctrl_0: tmuctrl@160118 {
74-
compatible = "samsung,exynos5440-tmu";
75-
reg = <0x160118 0x230>, <0x160368 0x10>;
76-
interrupts = <0 58 0>;
77-
clocks = <&clock 21>;
78-
clock-names = "tmu_apbif";
79-
#thermal-sensor-cells = <0>;
80-
};
81-
82-
Example 3): (In case of Exynos5420 "with misplaced TRIMINFO register")
70+
Example 2): (In case of Exynos5420 "with misplaced TRIMINFO register")
8371
tmu_cpu2: tmu@10068000 {
8472
compatible = "samsung,exynos5420-tmu-ext-triminfo";
8573
reg = <0x10068000 0x100>, <0x1006c000 0x4>;

‎drivers/thermal/samsung/exynos_tmu.c

Lines changed: 3 additions & 158 deletions
Original file line numberDiff line numberDiff line change
@@ -126,28 +126,6 @@
126126

127127
#define EXYNOS5433_G3D_BASE 0x10070000
128128

129-
/*exynos5440 specific registers*/
130-
#define EXYNOS5440_TMU_S0_7_TRIM 0x000
131-
#define EXYNOS5440_TMU_S0_7_CTRL 0x020
132-
#define EXYNOS5440_TMU_S0_7_DEBUG 0x040
133-
#define EXYNOS5440_TMU_S0_7_TEMP 0x0f0
134-
#define EXYNOS5440_TMU_S0_7_TH0 0x110
135-
#define EXYNOS5440_TMU_S0_7_TH1 0x130
136-
#define EXYNOS5440_TMU_S0_7_TH2 0x150
137-
#define EXYNOS5440_TMU_S0_7_IRQEN 0x210
138-
#define EXYNOS5440_TMU_S0_7_IRQ 0x230
139-
/* exynos5440 common registers */
140-
#define EXYNOS5440_TMU_IRQ_STATUS 0x000
141-
#define EXYNOS5440_TMU_PMIN 0x004
142-
143-
#define EXYNOS5440_TMU_INTEN_RISE0_SHIFT 0
144-
#define EXYNOS5440_TMU_INTEN_RISE1_SHIFT 1
145-
#define EXYNOS5440_TMU_INTEN_RISE2_SHIFT 2
146-
#define EXYNOS5440_TMU_INTEN_RISE3_SHIFT 3
147-
#define EXYNOS5440_TMU_INTEN_FALL0_SHIFT 4
148-
#define EXYNOS5440_TMU_TH_RISE4_SHIFT 24
149-
#define EXYNOS5440_EFUSE_SWAP_OFFSET 8
150-
151129
/* Exynos7 specific registers */
152130
#define EXYNOS7_THD_TEMP_RISE7_6 0x50
153131
#define EXYNOS7_THD_TEMP_FALL7_6 0x60
@@ -184,7 +162,6 @@ enum soc_type {
184162
SOC_ARCH_EXYNOS5420,
185163
SOC_ARCH_EXYNOS5420_TRIMINFO,
186164
SOC_ARCH_EXYNOS5433,
187-
SOC_ARCH_EXYNOS5440,
188165
SOC_ARCH_EXYNOS7,
189166
};
190167

@@ -619,57 +596,6 @@ static int exynos5433_tmu_initialize(struct platform_device *pdev)
619596
return ret;
620597
}
621598

622-
static int exynos5440_tmu_initialize(struct platform_device *pdev)
623-
{
624-
struct exynos_tmu_data *data = platform_get_drvdata(pdev);
625-
unsigned int trim_info = 0, con, rising_threshold;
626-
int threshold_code;
627-
int crit_temp = 0;
628-
629-
/*
630-
* For exynos5440 soc triminfo value is swapped between TMU0 and
631-
* TMU2, so the below logic is needed.
632-
*/
633-
switch (data->id) {
634-
case 0:
635-
trim_info = readl(data->base + EXYNOS5440_EFUSE_SWAP_OFFSET +
636-
EXYNOS5440_TMU_S0_7_TRIM);
637-
break;
638-
case 1:
639-
trim_info = readl(data->base + EXYNOS5440_TMU_S0_7_TRIM);
640-
break;
641-
case 2:
642-
trim_info = readl(data->base - EXYNOS5440_EFUSE_SWAP_OFFSET +
643-
EXYNOS5440_TMU_S0_7_TRIM);
644-
}
645-
sanitize_temp_error(data, trim_info);
646-
647-
/* Write temperature code for rising and falling threshold */
648-
rising_threshold = readl(data->base + EXYNOS5440_TMU_S0_7_TH0);
649-
rising_threshold = get_th_reg(data, rising_threshold, false);
650-
writel(rising_threshold, data->base + EXYNOS5440_TMU_S0_7_TH0);
651-
writel(0, data->base + EXYNOS5440_TMU_S0_7_TH1);
652-
653-
data->tmu_clear_irqs(data);
654-
655-
/* if last threshold limit is also present */
656-
if (!data->tzd->ops->get_crit_temp(data->tzd, &crit_temp)) {
657-
threshold_code = temp_to_code(data, crit_temp / MCELSIUS);
658-
/* 5th level to be assigned in th2 reg */
659-
rising_threshold =
660-
threshold_code << EXYNOS5440_TMU_TH_RISE4_SHIFT;
661-
writel(rising_threshold, data->base + EXYNOS5440_TMU_S0_7_TH2);
662-
con = readl(data->base + EXYNOS5440_TMU_S0_7_CTRL);
663-
con |= (1 << EXYNOS_TMU_THERM_TRIP_EN_SHIFT);
664-
writel(con, data->base + EXYNOS5440_TMU_S0_7_CTRL);
665-
}
666-
/* Clear the PMIN in the common TMU register */
667-
if (!data->id)
668-
writel(0, data->base_second + EXYNOS5440_TMU_PMIN);
669-
670-
return 0;
671-
}
672-
673599
static int exynos7_tmu_initialize(struct platform_device *pdev)
674600
{
675601
struct exynos_tmu_data *data = platform_get_drvdata(pdev);
@@ -820,35 +746,6 @@ static void exynos5433_tmu_control(struct platform_device *pdev, bool on)
820746
writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
821747
}
822748

823-
static void exynos5440_tmu_control(struct platform_device *pdev, bool on)
824-
{
825-
struct exynos_tmu_data *data = platform_get_drvdata(pdev);
826-
struct thermal_zone_device *tz = data->tzd;
827-
unsigned int con, interrupt_en;
828-
829-
con = get_con_reg(data, readl(data->base + EXYNOS5440_TMU_S0_7_CTRL));
830-
831-
if (on) {
832-
con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);
833-
interrupt_en =
834-
(of_thermal_is_trip_valid(tz, 3)
835-
<< EXYNOS5440_TMU_INTEN_RISE3_SHIFT) |
836-
(of_thermal_is_trip_valid(tz, 2)
837-
<< EXYNOS5440_TMU_INTEN_RISE2_SHIFT) |
838-
(of_thermal_is_trip_valid(tz, 1)
839-
<< EXYNOS5440_TMU_INTEN_RISE1_SHIFT) |
840-
(of_thermal_is_trip_valid(tz, 0)
841-
<< EXYNOS5440_TMU_INTEN_RISE0_SHIFT);
842-
interrupt_en |=
843-
interrupt_en << EXYNOS5440_TMU_INTEN_FALL0_SHIFT;
844-
} else {
845-
con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT);
846-
interrupt_en = 0; /* Disable all interrupts */
847-
}
848-
writel(interrupt_en, data->base + EXYNOS5440_TMU_S0_7_IRQEN);
849-
writel(con, data->base + EXYNOS5440_TMU_S0_7_CTRL);
850-
}
851-
852749
static void exynos7_tmu_control(struct platform_device *pdev, bool on)
853750
{
854751
struct exynos_tmu_data *data = platform_get_drvdata(pdev);
@@ -920,10 +817,8 @@ static u32 get_emul_con_reg(struct exynos_tmu_data *data, unsigned int val,
920817
if (temp) {
921818
temp /= MCELSIUS;
922819

923-
if (data->soc != SOC_ARCH_EXYNOS5440) {
924-
val &= ~(EXYNOS_EMUL_TIME_MASK << EXYNOS_EMUL_TIME_SHIFT);
925-
val |= (EXYNOS_EMUL_TIME << EXYNOS_EMUL_TIME_SHIFT);
926-
}
820+
val &= ~(EXYNOS_EMUL_TIME_MASK << EXYNOS_EMUL_TIME_SHIFT);
821+
val |= (EXYNOS_EMUL_TIME << EXYNOS_EMUL_TIME_SHIFT);
927822
if (data->soc == SOC_ARCH_EXYNOS7) {
928823
val &= ~(EXYNOS7_EMUL_DATA_MASK <<
929824
EXYNOS7_EMUL_DATA_SHIFT);
@@ -964,16 +859,6 @@ static void exynos4412_tmu_set_emulation(struct exynos_tmu_data *data,
964859
writel(val, data->base + emul_con);
965860
}
966861

967-
static void exynos5440_tmu_set_emulation(struct exynos_tmu_data *data,
968-
int temp)
969-
{
970-
unsigned int val;
971-
972-
val = readl(data->base + EXYNOS5440_TMU_S0_7_DEBUG);
973-
val = get_emul_con_reg(data, val, temp);
974-
writel(val, data->base + EXYNOS5440_TMU_S0_7_DEBUG);
975-
}
976-
977862
static int exynos_tmu_set_emulation(void *drv_data, int temp)
978863
{
979864
struct exynos_tmu_data *data = drv_data;
@@ -996,7 +881,6 @@ static int exynos_tmu_set_emulation(void *drv_data, int temp)
996881
}
997882
#else
998883
#define exynos4412_tmu_set_emulation NULL
999-
#define exynos5440_tmu_set_emulation NULL
1000884
static int exynos_tmu_set_emulation(void *drv_data, int temp)
1001885
{ return -EINVAL; }
1002886
#endif /* CONFIG_THERMAL_EMULATION */
@@ -1014,11 +898,6 @@ static int exynos4412_tmu_read(struct exynos_tmu_data *data)
1014898
return readb(data->base + EXYNOS_TMU_REG_CURRENT_TEMP);
1015899
}
1016900

1017-
static int exynos5440_tmu_read(struct exynos_tmu_data *data)
1018-
{
1019-
return readb(data->base + EXYNOS5440_TMU_S0_7_TEMP);
1020-
}
1021-
1022901
static int exynos7_tmu_read(struct exynos_tmu_data *data)
1023902
{
1024903
return readw(data->base + EXYNOS_TMU_REG_CURRENT_TEMP) &
@@ -1029,16 +908,9 @@ static void exynos_tmu_work(struct work_struct *work)
1029908
{
1030909
struct exynos_tmu_data *data = container_of(work,
1031910
struct exynos_tmu_data, irq_work);
1032-
unsigned int val_type;
1033911

1034912
if (!IS_ERR(data->clk_sec))
1035913
clk_enable(data->clk_sec);
1036-
/* Find which sensor generated this interrupt */
1037-
if (data->soc == SOC_ARCH_EXYNOS5440) {
1038-
val_type = readl(data->base_second + EXYNOS5440_TMU_IRQ_STATUS);
1039-
if (!((val_type >> data->id) & 0x1))
1040-
goto out;
1041-
}
1042914
if (!IS_ERR(data->clk_sec))
1043915
clk_disable(data->clk_sec);
1044916

@@ -1051,7 +923,6 @@ static void exynos_tmu_work(struct work_struct *work)
1051923

1052924
clk_disable(data->clk);
1053925
mutex_unlock(&data->lock);
1054-
out:
1055926
enable_irq(data->irq);
1056927
}
1057928

@@ -1086,15 +957,6 @@ static void exynos4210_tmu_clear_irqs(struct exynos_tmu_data *data)
1086957
writel(val_irq, data->base + tmu_intclear);
1087958
}
1088959

1089-
static void exynos5440_tmu_clear_irqs(struct exynos_tmu_data *data)
1090-
{
1091-
unsigned int val_irq;
1092-
1093-
val_irq = readl(data->base + EXYNOS5440_TMU_S0_7_IRQ);
1094-
/* clear the interrupts */
1095-
writel(val_irq, data->base + EXYNOS5440_TMU_S0_7_IRQ);
1096-
}
1097-
1098960
static irqreturn_t exynos_tmu_irq(int irq, void *id)
1099961
{
1100962
struct exynos_tmu_data *data = id;
@@ -1130,9 +992,6 @@ static const struct of_device_id exynos_tmu_match[] = {
1130992
}, {
1131993
.compatible = "samsung,exynos5433-tmu",
1132994
.data = (const void *)SOC_ARCH_EXYNOS5433,
1133-
}, {
1134-
.compatible = "samsung,exynos5440-tmu",
1135-
.data = (const void *)SOC_ARCH_EXYNOS5440,
1136995
}, {
1137996
.compatible = "samsung,exynos7-tmu",
1138997
.data = (const void *)SOC_ARCH_EXYNOS7,
@@ -1223,19 +1082,6 @@ static int exynos_map_dt_data(struct platform_device *pdev)
12231082
data->min_efuse_value = 40;
12241083
data->max_efuse_value = 150;
12251084
break;
1226-
case SOC_ARCH_EXYNOS5440:
1227-
data->tmu_initialize = exynos5440_tmu_initialize;
1228-
data->tmu_control = exynos5440_tmu_control;
1229-
data->tmu_read = exynos5440_tmu_read;
1230-
data->tmu_set_emulation = exynos5440_tmu_set_emulation;
1231-
data->tmu_clear_irqs = exynos5440_tmu_clear_irqs;
1232-
data->ntrip = 4;
1233-
data->gain = 5;
1234-
data->reference_voltage = 16;
1235-
data->efuse_value = 0x5d2d;
1236-
data->min_efuse_value = 16;
1237-
data->max_efuse_value = 76;
1238-
break;
12391085
case SOC_ARCH_EXYNOS7:
12401086
data->tmu_initialize = exynos7_tmu_initialize;
12411087
data->tmu_control = exynos7_tmu_control;
@@ -1260,8 +1106,7 @@ static int exynos_map_dt_data(struct platform_device *pdev)
12601106
* Check if the TMU shares some registers and then try to map the
12611107
* memory of common registers.
12621108
*/
1263-
if (data->soc != SOC_ARCH_EXYNOS5420_TRIMINFO &&
1264-
data->soc != SOC_ARCH_EXYNOS5440)
1109+
if (data->soc != SOC_ARCH_EXYNOS5420_TRIMINFO)
12651110
return 0;
12661111

12671112
if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {

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