Skip to content

Commit 807cba6

Browse files
committed
Merge tag 'gvt-fixes-2018-04-19' of https://github.com/intel/gvt-linux into drm-intel-next-fixes
gvt-fixes-2018-04-19 - cmd parser error path mem leak fix (Colin) - fix dp aux header validation (Changbin) - sanity check on pfn after vfio pin page (Changbin) - fix msi eventfd put (Xiong) Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180419073948.4mojv7xaxxvfuyud@zhen-hp.sh.intel.com
2 parents 197af5f + 39b4cba commit 807cba6

File tree

4 files changed

+44
-6
lines changed

4 files changed

+44
-6
lines changed

drivers/gpu/drm/i915/gvt/cmd_parser.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2909,6 +2909,7 @@ static int init_cmd_table(struct intel_gvt *gvt)
29092909
if (info) {
29102910
gvt_err("%s %s duplicated\n", e->info->name,
29112911
info->name);
2912+
kfree(e);
29122913
return -EEXIST;
29132914
}
29142915

drivers/gpu/drm/i915/gvt/display.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -67,7 +67,7 @@
6767
#define AUX_NATIVE_REPLY_NAK (0x1 << 4)
6868
#define AUX_NATIVE_REPLY_DEFER (0x2 << 4)
6969

70-
#define AUX_BURST_SIZE 16
70+
#define AUX_BURST_SIZE 20
7171

7272
/* DPCD addresses */
7373
#define DPCD_REV 0x000

drivers/gpu/drm/i915/gvt/handlers.c

Lines changed: 9 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -903,11 +903,14 @@ static int dp_aux_ch_ctl_mmio_write(struct intel_vgpu *vgpu,
903903
}
904904

905905
/*
906-
* Write request format: (command + address) occupies
907-
* 3 bytes, followed by (len + 1) bytes of data.
906+
* Write request format: Headr (command + address + size) occupies
907+
* 4 bytes, followed by (len + 1) bytes of data. See details at
908+
* intel_dp_aux_transfer().
908909
*/
909-
if (WARN_ON((len + 4) > AUX_BURST_SIZE))
910+
if ((len + 1 + 4) > AUX_BURST_SIZE) {
911+
gvt_vgpu_err("dp_aux_header: len %d is too large\n", len);
910912
return -EINVAL;
913+
}
911914

912915
/* unpack data from vreg to buf */
913916
for (t = 0; t < 4; t++) {
@@ -971,8 +974,10 @@ static int dp_aux_ch_ctl_mmio_write(struct intel_vgpu *vgpu,
971974
/*
972975
* Read reply format: ACK (1 byte) plus (len + 1) bytes of data.
973976
*/
974-
if (WARN_ON((len + 2) > AUX_BURST_SIZE))
977+
if ((len + 2) > AUX_BURST_SIZE) {
978+
gvt_vgpu_err("dp_aux_header: len %d is too large\n", len);
975979
return -EINVAL;
980+
}
976981

977982
/* read from virtual DPCD to vreg */
978983
/* first 4 bytes: [ACK][addr][addr+1][addr+2] */

drivers/gpu/drm/i915/gvt/kvmgt.c

Lines changed: 33 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -123,6 +123,12 @@ static int gvt_dma_map_page(struct intel_vgpu *vgpu, unsigned long gfn,
123123
return -EINVAL;
124124
}
125125

126+
if (!pfn_valid(pfn)) {
127+
gvt_vgpu_err("pfn 0x%lx is not mem backed\n", pfn);
128+
vfio_unpin_pages(mdev_dev(vgpu->vdev.mdev), &gfn, 1);
129+
return -EINVAL;
130+
}
131+
126132
/* Setup DMA mapping. */
127133
page = pfn_to_page(pfn);
128134
*dma_addr = dma_map_page(dev, page, 0, PAGE_SIZE,
@@ -583,6 +589,17 @@ static int intel_vgpu_open(struct mdev_device *mdev)
583589
return ret;
584590
}
585591

592+
static void intel_vgpu_release_msi_eventfd_ctx(struct intel_vgpu *vgpu)
593+
{
594+
struct eventfd_ctx *trigger;
595+
596+
trigger = vgpu->vdev.msi_trigger;
597+
if (trigger) {
598+
eventfd_ctx_put(trigger);
599+
vgpu->vdev.msi_trigger = NULL;
600+
}
601+
}
602+
586603
static void __intel_vgpu_release(struct intel_vgpu *vgpu)
587604
{
588605
struct kvmgt_guest_info *info;
@@ -607,6 +624,8 @@ static void __intel_vgpu_release(struct intel_vgpu *vgpu)
607624
info = (struct kvmgt_guest_info *)vgpu->handle;
608625
kvmgt_guest_exit(info);
609626

627+
intel_vgpu_release_msi_eventfd_ctx(vgpu);
628+
610629
vgpu->vdev.kvm = NULL;
611630
vgpu->handle = 0;
612631
}
@@ -987,7 +1006,8 @@ static int intel_vgpu_set_msi_trigger(struct intel_vgpu *vgpu,
9871006
return PTR_ERR(trigger);
9881007
}
9891008
vgpu->vdev.msi_trigger = trigger;
990-
}
1009+
} else if ((flags & VFIO_IRQ_SET_DATA_NONE) && !count)
1010+
intel_vgpu_release_msi_eventfd_ctx(vgpu);
9911011

9921012
return 0;
9931013
}
@@ -1592,6 +1612,18 @@ static int kvmgt_inject_msi(unsigned long handle, u32 addr, u16 data)
15921612
info = (struct kvmgt_guest_info *)handle;
15931613
vgpu = info->vgpu;
15941614

1615+
/*
1616+
* When guest is poweroff, msi_trigger is set to NULL, but vgpu's
1617+
* config and mmio register isn't restored to default during guest
1618+
* poweroff. If this vgpu is still used in next vm, this vgpu's pipe
1619+
* may be enabled, then once this vgpu is active, it will get inject
1620+
* vblank interrupt request. But msi_trigger is null until msi is
1621+
* enabled by guest. so if msi_trigger is null, success is still
1622+
* returned and don't inject interrupt into guest.
1623+
*/
1624+
if (vgpu->vdev.msi_trigger == NULL)
1625+
return 0;
1626+
15951627
if (eventfd_signal(vgpu->vdev.msi_trigger, 1) == 1)
15961628
return 0;
15971629

0 commit comments

Comments
 (0)