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Huy Nguyendavem330
Huy Nguyen
authored and
davem330
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net/mlx5e: Read ETS settings directly from firmware
Issue description: Current implementation saves the ETS settings from user in a temporal soft copy and returns this settings when user queries the ETS settings. With the new DCBX firmware, the ETS settings can be changed by firmware when the DCBX is in firmware controlled mode. Therefore, user will obtain wrong values from the temporal soft copy. Solution: 1. Read the ETS settings directly from firmware. 2. For tc_tsa: a. Initialize tc_tsa to vendor IEEE_8021QAZ_TSA_VENDOR at netdev creation. b. When reading ETS setting from FW, if the traffic class bandwidth is less than 100, set tc_tsa to IEEE_8021QAZ_TSA_ETS. This implementation solves the scenarios when the DCBX is in FW control and willing bit is on which means the ETS setting is dictated by remote switch. Also check ETS capability where needed. Signed-off-by: Huy Nguyen <huyn@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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-25
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3 files changed

+56
-25
lines changed

‎drivers/net/ethernet/mellanox/mlx5/core/en.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -214,9 +214,6 @@ struct mlx5e_params {
214214
u8 toeplitz_hash_key[40];
215215
u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE];
216216
bool vlan_strip_disable;
217-
#ifdef CONFIG_MLX5_CORE_EN_DCB
218-
struct ieee_ets ets;
219-
#endif
220217
bool rx_am_enabled;
221218
u32 lro_timeout;
222219
};
@@ -238,6 +235,9 @@ enum {
238235

239236
struct mlx5e_dcbx {
240237
struct mlx5e_cee_config cee_cfg; /* pending configuration */
238+
239+
/* The only setting that cannot be read from FW */
240+
u8 tc_tsa[IEEE_8021QAZ_MAX_TCS];
241241
};
242242
#endif
243243

‎drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c

Lines changed: 36 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -45,12 +45,31 @@ static int mlx5e_dcbnl_ieee_getets(struct net_device *netdev,
4545
struct ieee_ets *ets)
4646
{
4747
struct mlx5e_priv *priv = netdev_priv(netdev);
48+
struct mlx5_core_dev *mdev = priv->mdev;
49+
int err = 0;
50+
int i;
4851

4952
if (!MLX5_CAP_GEN(priv->mdev, ets))
5053
return -ENOTSUPP;
5154

52-
memcpy(ets, &priv->params.ets, sizeof(*ets));
53-
return 0;
55+
ets->ets_cap = mlx5_max_tc(priv->mdev) + 1;
56+
for (i = 0; i < ets->ets_cap; i++) {
57+
err = mlx5_query_port_prio_tc(mdev, i, &ets->prio_tc[i]);
58+
if (err)
59+
return err;
60+
}
61+
62+
for (i = 0; i < ets->ets_cap; i++) {
63+
err = mlx5_query_port_tc_bw_alloc(mdev, i, &ets->tc_tx_bw[i]);
64+
if (err)
65+
return err;
66+
if (ets->tc_tx_bw[i] < MLX5E_MAX_BW_ALLOC)
67+
priv->dcbx.tc_tsa[i] = IEEE_8021QAZ_TSA_ETS;
68+
}
69+
70+
memcpy(ets->tc_tsa, priv->dcbx.tc_tsa, sizeof(ets->tc_tsa));
71+
72+
return err;
5473
}
5574

5675
enum {
@@ -113,9 +132,6 @@ int mlx5e_dcbnl_ieee_setets_core(struct mlx5e_priv *priv, struct ieee_ets *ets)
113132
int max_tc = mlx5_max_tc(mdev);
114133
int err;
115134

116-
if (!MLX5_CAP_GEN(mdev, ets))
117-
return -ENOTSUPP;
118-
119135
mlx5e_build_tc_group(ets, tc_group, max_tc);
120136
mlx5e_build_tc_tx_bw(ets, tc_tx_bw, tc_group, max_tc);
121137

@@ -127,7 +143,14 @@ int mlx5e_dcbnl_ieee_setets_core(struct mlx5e_priv *priv, struct ieee_ets *ets)
127143
if (err)
128144
return err;
129145

130-
return mlx5_set_port_tc_bw_alloc(mdev, tc_tx_bw);
146+
err = mlx5_set_port_tc_bw_alloc(mdev, tc_tx_bw);
147+
148+
if (err)
149+
return err;
150+
151+
memcpy(priv->dcbx.tc_tsa, ets->tc_tsa, sizeof(ets->tc_tsa));
152+
153+
return err;
131154
}
132155

133156
static int mlx5e_dbcnl_validate_ets(struct net_device *netdev,
@@ -173,6 +196,9 @@ static int mlx5e_dcbnl_ieee_setets(struct net_device *netdev,
173196
struct mlx5e_priv *priv = netdev_priv(netdev);
174197
int err;
175198

199+
if (!MLX5_CAP_GEN(priv->mdev, ets))
200+
return -ENOTSUPP;
201+
176202
err = mlx5e_dbcnl_validate_ets(netdev, ets);
177203
if (err)
178204
return err;
@@ -181,9 +207,6 @@ static int mlx5e_dcbnl_ieee_setets(struct net_device *netdev,
181207
if (err)
182208
return err;
183209

184-
memcpy(&priv->params.ets, ets, sizeof(*ets));
185-
priv->params.ets.ets_cap = mlx5_max_tc(priv->mdev) + 1;
186-
187210
return 0;
188211
}
189212

@@ -316,9 +339,12 @@ static u8 mlx5e_dcbnl_setall(struct net_device *netdev)
316339
struct mlx5_core_dev *mdev = priv->mdev;
317340
struct ieee_ets ets;
318341
struct ieee_pfc pfc;
319-
int err;
342+
int err = -ENOTSUPP;
320343
int i;
321344

345+
if (!MLX5_CAP_GEN(mdev, ets))
346+
goto out;
347+
322348
memset(&ets, 0, sizeof(ets));
323349
memset(&pfc, 0, sizeof(pfc));
324350

‎drivers/net/ethernet/mellanox/mlx5/core/en_main.c

Lines changed: 17 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -3328,18 +3328,27 @@ u16 mlx5e_get_max_inline_cap(struct mlx5_core_dev *mdev)
33283328
#ifdef CONFIG_MLX5_CORE_EN_DCB
33293329
static void mlx5e_ets_init(struct mlx5e_priv *priv)
33303330
{
3331+
struct ieee_ets ets;
33313332
int i;
33323333

3333-
priv->params.ets.ets_cap = mlx5_max_tc(priv->mdev) + 1;
3334-
for (i = 0; i < priv->params.ets.ets_cap; i++) {
3335-
priv->params.ets.tc_tx_bw[i] = MLX5E_MAX_BW_ALLOC;
3336-
priv->params.ets.tc_tsa[i] = IEEE_8021QAZ_TSA_VENDOR;
3337-
priv->params.ets.prio_tc[i] = i;
3334+
if (!MLX5_CAP_GEN(priv->mdev, ets))
3335+
return;
3336+
3337+
memset(&ets, 0, sizeof(ets));
3338+
ets.ets_cap = mlx5_max_tc(priv->mdev) + 1;
3339+
for (i = 0; i < ets.ets_cap; i++) {
3340+
ets.tc_tx_bw[i] = MLX5E_MAX_BW_ALLOC;
3341+
ets.tc_tsa[i] = IEEE_8021QAZ_TSA_VENDOR;
3342+
ets.prio_tc[i] = i;
33383343
}
33393344

3345+
memcpy(priv->dcbx.tc_tsa, ets.tc_tsa, sizeof(ets.tc_tsa));
3346+
33403347
/* tclass[prio=0]=1, tclass[prio=1]=0, tclass[prio=i]=i (for i>1) */
3341-
priv->params.ets.prio_tc[0] = 1;
3342-
priv->params.ets.prio_tc[1] = 0;
3348+
ets.prio_tc[0] = 1;
3349+
ets.prio_tc[1] = 0;
3350+
3351+
mlx5e_dcbnl_ieee_setets_core(priv, &ets);
33433352
}
33443353
#endif
33453354

@@ -3509,10 +3518,6 @@ static void mlx5e_build_nic_netdev_priv(struct mlx5_core_dev *mdev,
35093518
MLX5E_SET_PRIV_FLAG(priv, MLX5E_PFLAG_RX_CQE_BASED_MODER,
35103519
priv->params.rx_cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE);
35113520

3512-
#ifdef CONFIG_MLX5_CORE_EN_DCB
3513-
mlx5e_ets_init(priv);
3514-
#endif
3515-
35163521
mutex_init(&priv->state_lock);
35173522

35183523
INIT_WORK(&priv->update_carrier_work, mlx5e_update_carrier_work);
@@ -3789,7 +3794,7 @@ static int mlx5e_init_nic_tx(struct mlx5e_priv *priv)
37893794
}
37903795

37913796
#ifdef CONFIG_MLX5_CORE_EN_DCB
3792-
mlx5e_dcbnl_ieee_setets_core(priv, &priv->params.ets);
3797+
mlx5e_ets_init(priv);
37933798
#endif
37943799
return 0;
37953800
}

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