Skip to content

Commit 838a2ae

Browse files
shawnguo2olofj
shawnguo2
authored and
olofj
committed
ARM: use clockevents_config_and_register() where possible
The clockevent core is able to figure out the best mult and shift, calculate min_delta_ns and max_delta_ns, with the necessary info passed into clockevents_config_and_register(). Use this combined configure and register function where possible to make the codes less error prone and gain some positive diff stat. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Anton Vorontsov <cbouatmailru@gmail.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Tested-by: Roland Stigge <stigge@antcom.de> Acked-by: Eric Miao <eric.y.miao@gmail.com> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: David Brown <davidb@codeaurora.org> Tested-by: Tony Lindgren <tony@atomide.com> Acked-by: Barry Song <baohua.song@csr.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Tony Prisk <linux@prisktech.co.nz> Cc: Lennert Buytenhek <buytenh@wantstofly.org> Cc: Wan ZongShun <mcuos.com@gmail.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Jason Cooper <jason@lakedaemon.net> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Olof Johansson <olof@lixom.net>
1 parent c35ef95 commit 838a2ae

File tree

25 files changed

+53
-209
lines changed

25 files changed

+53
-209
lines changed

‎arch/arm/mach-at91/at91rm9200_time.c

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -174,7 +174,6 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
174174
static struct clock_event_device clkevt = {
175175
.name = "at91_tick",
176176
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
177-
.shift = 32,
178177
.rating = 150,
179178
.set_next_event = clkevt32k_next_event,
180179
.set_mode = clkevt32k_mode,
@@ -265,11 +264,9 @@ void __init at91rm9200_timer_init(void)
265264
at91_st_write(AT91_ST_RTMR, 1);
266265

267266
/* Setup timer clockevent, with minimum of two ticks (important!!) */
268-
clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
269-
clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt);
270-
clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1;
271267
clkevt.cpumask = cpumask_of(0);
272-
clockevents_register_device(&clkevt);
268+
clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK,
269+
2, AT91_ST_ALMV);
273270

274271
/* register clocksource */
275272
clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK);

‎arch/arm/mach-cns3xxx/core.c

Lines changed: 3 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -134,7 +134,6 @@ static int cns3xxx_timer_set_next_event(unsigned long evt,
134134

135135
static struct clock_event_device cns3xxx_tmr1_clockevent = {
136136
.name = "cns3xxx timer1",
137-
.shift = 8,
138137
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
139138
.set_mode = cns3xxx_timer_set_mode,
140139
.set_next_event = cns3xxx_timer_set_next_event,
@@ -145,15 +144,9 @@ static struct clock_event_device cns3xxx_tmr1_clockevent = {
145144
static void __init cns3xxx_clockevents_init(unsigned int timer_irq)
146145
{
147146
cns3xxx_tmr1_clockevent.irq = timer_irq;
148-
cns3xxx_tmr1_clockevent.mult =
149-
div_sc((cns3xxx_cpu_clock() >> 3) * 1000000, NSEC_PER_SEC,
150-
cns3xxx_tmr1_clockevent.shift);
151-
cns3xxx_tmr1_clockevent.max_delta_ns =
152-
clockevent_delta2ns(0xffffffff, &cns3xxx_tmr1_clockevent);
153-
cns3xxx_tmr1_clockevent.min_delta_ns =
154-
clockevent_delta2ns(0xf, &cns3xxx_tmr1_clockevent);
155-
156-
clockevents_register_device(&cns3xxx_tmr1_clockevent);
147+
clockevents_config_and_register(&cns3xxx_tmr1_clockevent,
148+
(cns3xxx_cpu_clock() >> 3) * 1000000,
149+
0xf, 0xffffffff);
157150
}
158151

159152
/*

‎arch/arm/mach-exynos/mct.c

Lines changed: 4 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -255,13 +255,9 @@ static struct irqaction mct_comp_event_irq = {
255255

256256
static void exynos4_clockevent_init(void)
257257
{
258-
clockevents_calc_mult_shift(&mct_comp_device, clk_rate, 5);
259-
mct_comp_device.max_delta_ns =
260-
clockevent_delta2ns(0xffffffff, &mct_comp_device);
261-
mct_comp_device.min_delta_ns =
262-
clockevent_delta2ns(0xf, &mct_comp_device);
263258
mct_comp_device.cpumask = cpumask_of(0);
264-
clockevents_register_device(&mct_comp_device);
259+
clockevents_config_and_register(&mct_comp_device, clk_rate,
260+
0xf, 0xffffffff);
265261

266262
if (soc_is_exynos5250())
267263
setup_irq(EXYNOS5_IRQ_MCT_G0, &mct_comp_event_irq);
@@ -404,14 +400,8 @@ static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt)
404400
evt->set_mode = exynos4_tick_set_mode;
405401
evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
406402
evt->rating = 450;
407-
408-
clockevents_calc_mult_shift(evt, clk_rate / (TICK_BASE_CNT + 1), 5);
409-
evt->max_delta_ns =
410-
clockevent_delta2ns(0x7fffffff, evt);
411-
evt->min_delta_ns =
412-
clockevent_delta2ns(0xf, evt);
413-
414-
clockevents_register_device(evt);
403+
clockevents_config_and_register(evt, clk_rate / (TICK_BASE_CNT + 1),
404+
0xf, 0x7fffffff);
415405

416406
exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET);
417407

‎arch/arm/mach-footbridge/dc21285-timer.c

Lines changed: 1 addition & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -101,12 +101,8 @@ static void __init footbridge_timer_init(void)
101101

102102
setup_irq(ce->irq, &footbridge_timer_irq);
103103

104-
clockevents_calc_mult_shift(ce, mem_fclk_21285, 5);
105-
ce->max_delta_ns = clockevent_delta2ns(0xffffff, ce);
106-
ce->min_delta_ns = clockevent_delta2ns(0x000004, ce);
107104
ce->cpumask = cpumask_of(smp_processor_id());
108-
109-
clockevents_register_device(ce);
105+
clockevents_config_and_register(ce, mem_fclk_21285, 0x4, 0xffffff);
110106
}
111107

112108
struct sys_timer footbridge_timer = {

‎arch/arm/mach-imx/epit.c

Lines changed: 3 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -178,26 +178,17 @@ static struct irqaction epit_timer_irq = {
178178
static struct clock_event_device clockevent_epit = {
179179
.name = "epit",
180180
.features = CLOCK_EVT_FEAT_ONESHOT,
181-
.shift = 32,
182181
.set_mode = epit_set_mode,
183182
.set_next_event = epit_set_next_event,
184183
.rating = 200,
185184
};
186185

187186
static int __init epit_clockevent_init(struct clk *timer_clk)
188187
{
189-
unsigned int c = clk_get_rate(timer_clk);
190-
191-
clockevent_epit.mult = div_sc(c, NSEC_PER_SEC,
192-
clockevent_epit.shift);
193-
clockevent_epit.max_delta_ns =
194-
clockevent_delta2ns(0xfffffffe, &clockevent_epit);
195-
clockevent_epit.min_delta_ns =
196-
clockevent_delta2ns(0x800, &clockevent_epit);
197-
198188
clockevent_epit.cpumask = cpumask_of(0);
199-
200-
clockevents_register_device(&clockevent_epit);
189+
clockevents_config_and_register(&clockevent_epit,
190+
clk_get_rate(timer_clk),
191+
0x800, 0xfffffffe);
201192

202193
return 0;
203194
}

‎arch/arm/mach-imx/time.c

Lines changed: 3 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -256,29 +256,20 @@ static struct irqaction mxc_timer_irq = {
256256
static struct clock_event_device clockevent_mxc = {
257257
.name = "mxc_timer1",
258258
.features = CLOCK_EVT_FEAT_ONESHOT,
259-
.shift = 32,
260259
.set_mode = mxc_set_mode,
261260
.set_next_event = mx1_2_set_next_event,
262261
.rating = 200,
263262
};
264263

265264
static int __init mxc_clockevent_init(struct clk *timer_clk)
266265
{
267-
unsigned int c = clk_get_rate(timer_clk);
268-
269266
if (timer_is_v2())
270267
clockevent_mxc.set_next_event = v2_set_next_event;
271268

272-
clockevent_mxc.mult = div_sc(c, NSEC_PER_SEC,
273-
clockevent_mxc.shift);
274-
clockevent_mxc.max_delta_ns =
275-
clockevent_delta2ns(0xfffffffe, &clockevent_mxc);
276-
clockevent_mxc.min_delta_ns =
277-
clockevent_delta2ns(0xff, &clockevent_mxc);
278-
279269
clockevent_mxc.cpumask = cpumask_of(0);
280-
281-
clockevents_register_device(&clockevent_mxc);
270+
clockevents_config_and_register(&clockevent_mxc,
271+
clk_get_rate(timer_clk),
272+
0xff, 0xfffffffe);
282273

283274
return 0;
284275
}

‎arch/arm/mach-ixp4xx/common.c

Lines changed: 2 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -523,22 +523,15 @@ static struct clock_event_device clockevent_ixp4xx = {
523523
.name = "ixp4xx timer1",
524524
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
525525
.rating = 200,
526-
.shift = 24,
527526
.set_mode = ixp4xx_set_mode,
528527
.set_next_event = ixp4xx_set_next_event,
529528
};
530529

531530
static void __init ixp4xx_clockevent_init(void)
532531
{
533-
clockevent_ixp4xx.mult = div_sc(IXP4XX_TIMER_FREQ, NSEC_PER_SEC,
534-
clockevent_ixp4xx.shift);
535-
clockevent_ixp4xx.max_delta_ns =
536-
clockevent_delta2ns(0xfffffffe, &clockevent_ixp4xx);
537-
clockevent_ixp4xx.min_delta_ns =
538-
clockevent_delta2ns(0xf, &clockevent_ixp4xx);
539532
clockevent_ixp4xx.cpumask = cpumask_of(0);
540-
541-
clockevents_register_device(&clockevent_ixp4xx);
533+
clockevents_config_and_register(&clockevent_ixp4xx, IXP4XX_TIMER_FREQ,
534+
0xf, 0xfffffffe);
542535
}
543536

544537
void ixp4xx_restart(char mode, const char *cmd)

‎arch/arm/mach-lpc32xx/timer.c

Lines changed: 1 addition & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -70,7 +70,6 @@ static void lpc32xx_clkevt_mode(enum clock_event_mode mode,
7070
static struct clock_event_device lpc32xx_clkevt = {
7171
.name = "lpc32xx_clkevt",
7272
.features = CLOCK_EVT_FEAT_ONESHOT,
73-
.shift = 32,
7473
.rating = 300,
7574
.set_next_event = lpc32xx_clkevt_next_event,
7675
.set_mode = lpc32xx_clkevt_mode,
@@ -141,14 +140,8 @@ static void __init lpc32xx_timer_init(void)
141140
setup_irq(IRQ_LPC32XX_TIMER0, &lpc32xx_timer_irq);
142141

143142
/* Setup the clockevent structure. */
144-
lpc32xx_clkevt.mult = div_sc(clkrate, NSEC_PER_SEC,
145-
lpc32xx_clkevt.shift);
146-
lpc32xx_clkevt.max_delta_ns = clockevent_delta2ns(-1,
147-
&lpc32xx_clkevt);
148-
lpc32xx_clkevt.min_delta_ns = clockevent_delta2ns(1,
149-
&lpc32xx_clkevt) + 1;
150143
lpc32xx_clkevt.cpumask = cpumask_of(0);
151-
clockevents_register_device(&lpc32xx_clkevt);
144+
clockevents_config_and_register(&lpc32xx_clkevt, clkrate, 1, -1);
152145

153146
/* Use timer1 as clock source. */
154147
__raw_writel(LPC32XX_TIMER_CNTR_TCR_RESET,

‎arch/arm/mach-mmp/time.c

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -141,7 +141,6 @@ static void timer_set_mode(enum clock_event_mode mode,
141141
static struct clock_event_device ckevt = {
142142
.name = "clockevent",
143143
.features = CLOCK_EVT_FEAT_ONESHOT,
144-
.shift = 32,
145144
.rating = 200,
146145
.set_next_event = timer_set_next_event,
147146
.set_mode = timer_set_mode,
@@ -198,15 +197,13 @@ void __init timer_init(int irq)
198197

199198
setup_sched_clock(mmp_read_sched_clock, 32, CLOCK_TICK_RATE);
200199

201-
ckevt.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, ckevt.shift);
202-
ckevt.max_delta_ns = clockevent_delta2ns(MAX_DELTA, &ckevt);
203-
ckevt.min_delta_ns = clockevent_delta2ns(MIN_DELTA, &ckevt);
204200
ckevt.cpumask = cpumask_of(0);
205201

206202
setup_irq(irq, &timer_irq);
207203

208204
clocksource_register_hz(&cksrc, CLOCK_TICK_RATE);
209-
clockevents_register_device(&ckevt);
205+
clockevents_config_and_register(&ckevt, CLOCK_TICK_RATE,
206+
MIN_DELTA, MAX_DELTA);
210207
}
211208

212209
#ifdef CONFIG_OF

‎arch/arm/mach-msm/timer.c

Lines changed: 1 addition & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -144,13 +144,9 @@ static int __cpuinit msm_local_timer_setup(struct clock_event_device *evt)
144144
evt->rating = msm_clockevent.rating;
145145
evt->set_mode = msm_timer_set_mode;
146146
evt->set_next_event = msm_timer_set_next_event;
147-
evt->shift = msm_clockevent.shift;
148-
evt->mult = div_sc(GPT_HZ, NSEC_PER_SEC, evt->shift);
149-
evt->max_delta_ns = clockevent_delta2ns(0xf0000000, evt);
150-
evt->min_delta_ns = clockevent_delta2ns(4, evt);
151147

152148
*__this_cpu_ptr(msm_evt.percpu_evt) = evt;
153-
clockevents_register_device(evt);
149+
clockevents_config_and_register(evt, GPT_HZ, 4, 0xf0000000);
154150
enable_percpu_irq(evt->irq, IRQ_TYPE_EDGE_RISING);
155151
return 0;
156152
}

‎arch/arm/mach-mxs/timer.c

Lines changed: 5 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -195,33 +195,19 @@ static void mxs_set_mode(enum clock_event_mode mode,
195195
static struct clock_event_device mxs_clockevent_device = {
196196
.name = "mxs_timrot",
197197
.features = CLOCK_EVT_FEAT_ONESHOT,
198-
.shift = 32,
199198
.set_mode = mxs_set_mode,
200199
.set_next_event = timrotv2_set_next_event,
201200
.rating = 200,
202201
};
203202

204203
static int __init mxs_clockevent_init(struct clk *timer_clk)
205204
{
206-
unsigned int c = clk_get_rate(timer_clk);
207-
208-
mxs_clockevent_device.mult =
209-
div_sc(c, NSEC_PER_SEC, mxs_clockevent_device.shift);
210-
mxs_clockevent_device.cpumask = cpumask_of(0);
211-
if (timrot_is_v1()) {
205+
if (timrot_is_v1())
212206
mxs_clockevent_device.set_next_event = timrotv1_set_next_event;
213-
mxs_clockevent_device.max_delta_ns =
214-
clockevent_delta2ns(0xfffe, &mxs_clockevent_device);
215-
mxs_clockevent_device.min_delta_ns =
216-
clockevent_delta2ns(0xf, &mxs_clockevent_device);
217-
} else {
218-
mxs_clockevent_device.max_delta_ns =
219-
clockevent_delta2ns(0xfffffffe, &mxs_clockevent_device);
220-
mxs_clockevent_device.min_delta_ns =
221-
clockevent_delta2ns(0xf, &mxs_clockevent_device);
222-
}
223-
224-
clockevents_register_device(&mxs_clockevent_device);
207+
mxs_clockevent_device.cpumask = cpumask_of(0);
208+
clockevents_config_and_register(&mxs_clockevent_device,
209+
clk_get_rate(timer_clk), 0xf,
210+
timrot_is_v1() ? 0xfffe : 0xfffffffe);
225211

226212
return 0;
227213
}

‎arch/arm/mach-netx/time.c

Lines changed: 2 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -76,7 +76,6 @@ static int netx_set_next_event(unsigned long evt,
7676

7777
static struct clock_event_device netx_clockevent = {
7878
.name = "netx-timer" __stringify(TIMER_CLOCKEVENT),
79-
.shift = 32,
8079
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
8180
.set_next_event = netx_set_next_event,
8281
.set_mode = netx_set_mode,
@@ -140,16 +139,11 @@ static void __init netx_timer_init(void)
140139
clocksource_mmio_init(NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE),
141140
"netx_timer", CLOCK_TICK_RATE, 200, 32, clocksource_mmio_readl_up);
142141

143-
netx_clockevent.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC,
144-
netx_clockevent.shift);
145-
netx_clockevent.max_delta_ns =
146-
clockevent_delta2ns(0xfffffffe, &netx_clockevent);
147142
/* with max_delta_ns >= delta2ns(0x800) the system currently runs fine.
148143
* Adding some safety ... */
149-
netx_clockevent.min_delta_ns =
150-
clockevent_delta2ns(0xa00, &netx_clockevent);
151144
netx_clockevent.cpumask = cpumask_of(0);
152-
clockevents_register_device(&netx_clockevent);
145+
clockevents_config_and_register(&netx_clockevent, CLOCK_TICK_RATE,
146+
0xa00, 0xfffffffe);
153147
}
154148

155149
struct sys_timer netx_timer = {

‎arch/arm/mach-omap1/time.c

Lines changed: 2 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -145,7 +145,6 @@ static void omap_mpu_set_mode(enum clock_event_mode mode,
145145
static struct clock_event_device clockevent_mpu_timer1 = {
146146
.name = "mpu_timer1",
147147
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
148-
.shift = 32,
149148
.set_next_event = omap_mpu_set_next_event,
150149
.set_mode = omap_mpu_set_mode,
151150
};
@@ -170,15 +169,9 @@ static __init void omap_init_mpu_timer(unsigned long rate)
170169
setup_irq(INT_TIMER1, &omap_mpu_timer1_irq);
171170
omap_mpu_timer_start(0, (rate / HZ) - 1, 1);
172171

173-
clockevent_mpu_timer1.mult = div_sc(rate, NSEC_PER_SEC,
174-
clockevent_mpu_timer1.shift);
175-
clockevent_mpu_timer1.max_delta_ns =
176-
clockevent_delta2ns(-1, &clockevent_mpu_timer1);
177-
clockevent_mpu_timer1.min_delta_ns =
178-
clockevent_delta2ns(1, &clockevent_mpu_timer1);
179-
180172
clockevent_mpu_timer1.cpumask = cpumask_of(0);
181-
clockevents_register_device(&clockevent_mpu_timer1);
173+
clockevents_config_and_register(&clockevent_mpu_timer1, rate,
174+
1, -1);
182175
}
183176

184177

‎arch/arm/mach-omap1/timer32k.c

Lines changed: 2 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -140,7 +140,6 @@ static void omap_32k_timer_set_mode(enum clock_event_mode mode,
140140
static struct clock_event_device clockevent_32k_timer = {
141141
.name = "32k-timer",
142142
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
143-
.shift = 32,
144143
.set_next_event = omap_32k_timer_set_next_event,
145144
.set_mode = omap_32k_timer_set_mode,
146145
};
@@ -165,16 +164,9 @@ static __init void omap_init_32k_timer(void)
165164
{
166165
setup_irq(INT_OS_TIMER, &omap_32k_timer_irq);
167166

168-
clockevent_32k_timer.mult = div_sc(OMAP_32K_TICKS_PER_SEC,
169-
NSEC_PER_SEC,
170-
clockevent_32k_timer.shift);
171-
clockevent_32k_timer.max_delta_ns =
172-
clockevent_delta2ns(0xfffffffe, &clockevent_32k_timer);
173-
clockevent_32k_timer.min_delta_ns =
174-
clockevent_delta2ns(1, &clockevent_32k_timer);
175-
176167
clockevent_32k_timer.cpumask = cpumask_of(0);
177-
clockevents_register_device(&clockevent_32k_timer);
168+
clockevents_config_and_register(&clockevent_32k_timer,
169+
OMAP_32K_TICKS_PER_SEC, 1, 0xfffffffe);
178170
}
179171

180172
/*

‎arch/arm/mach-omap2/timer.c

Lines changed: 3 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -131,7 +131,6 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
131131
static struct clock_event_device clockevent_gpt = {
132132
.name = "gp_timer",
133133
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
134-
.shift = 32,
135134
.rating = 300,
136135
.set_next_event = omap2_gp_timer_set_next_event,
137136
.set_mode = omap2_gp_timer_set_mode,
@@ -340,17 +339,11 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
340339

341340
__omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW);
342341

343-
clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC,
344-
clockevent_gpt.shift);
345-
clockevent_gpt.max_delta_ns =
346-
clockevent_delta2ns(0xffffffff, &clockevent_gpt);
347-
clockevent_gpt.min_delta_ns =
348-
clockevent_delta2ns(3, &clockevent_gpt);
349-
/* Timer internal resynch latency. */
350-
351342
clockevent_gpt.cpumask = cpu_possible_mask;
352343
clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev);
353-
clockevents_register_device(&clockevent_gpt);
344+
clockevents_config_and_register(&clockevent_gpt, clkev.rate,
345+
3, /* Timer internal resynch latency */
346+
0xffffffff);
354347

355348
pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n",
356349
gptimer_id, clkev.rate);

0 commit comments

Comments
 (0)