Skip to content

Commit 838c112

Browse files
Jacopo Mondihorms
authored andcommitted
arm64: dts: renesas: r8a77965: Add dmac device nods
Add dmac[0-2] device nodes for R-Car M3-N (r8a77965) SoC. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
1 parent 5a2cd7e commit 838c112

File tree

1 file changed

+93
-3
lines changed

1 file changed

+93
-3
lines changed

arch/arm64/boot/dts/renesas/r8a77965.dtsi

Lines changed: 93 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -233,15 +233,105 @@
233233
};
234234

235235
dmac0: dma-controller@e6700000 {
236-
/* placeholder */
236+
compatible = "renesas,dmac-r8a77965",
237+
"renesas,rcar-dmac";
238+
reg = <0 0xe6700000 0 0x10000>;
239+
interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
240+
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
241+
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
242+
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
243+
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
244+
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
245+
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
246+
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
247+
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
248+
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
249+
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
250+
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
251+
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
252+
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
253+
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
254+
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
255+
GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
256+
interrupt-names = "error",
257+
"ch0", "ch1", "ch2", "ch3",
258+
"ch4", "ch5", "ch6", "ch7",
259+
"ch8", "ch9", "ch10", "ch11",
260+
"ch12", "ch13", "ch14", "ch15";
261+
clocks = <&cpg CPG_MOD 219>;
262+
clock-names = "fck";
263+
power-domains = <&sysc 32>;
264+
resets = <&cpg 219>;
265+
#dma-cells = <1>;
266+
dma-channels = <16>;
237267
};
238268

239269
dmac1: dma-controller@e7300000 {
240-
/* placeholder */
270+
compatible = "renesas,dmac-r8a77965",
271+
"renesas,rcar-dmac";
272+
reg = <0 0xe7300000 0 0x10000>;
273+
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
274+
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
275+
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
276+
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
277+
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
278+
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
279+
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
280+
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
281+
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
282+
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
283+
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
284+
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
285+
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
286+
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
287+
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
288+
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
289+
GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
290+
interrupt-names = "error",
291+
"ch0", "ch1", "ch2", "ch3",
292+
"ch4", "ch5", "ch6", "ch7",
293+
"ch8", "ch9", "ch10", "ch11",
294+
"ch12", "ch13", "ch14", "ch15";
295+
clocks = <&cpg CPG_MOD 218>;
296+
clock-names = "fck";
297+
power-domains = <&sysc 32>;
298+
resets = <&cpg 218>;
299+
#dma-cells = <1>;
300+
dma-channels = <16>;
241301
};
242302

243303
dmac2: dma-controller@e7310000 {
244-
/* placeholder */
304+
compatible = "renesas,dmac-r8a77965",
305+
"renesas,rcar-dmac";
306+
reg = <0 0xe7310000 0 0x10000>;
307+
interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
308+
GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
309+
GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
310+
GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
311+
GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
312+
GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
313+
GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
314+
GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
315+
GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
316+
GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
317+
GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
318+
GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
319+
GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
320+
GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
321+
GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
322+
GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
323+
GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
324+
interrupt-names = "error",
325+
"ch0", "ch1", "ch2", "ch3",
326+
"ch4", "ch5", "ch6", "ch7",
327+
"ch8", "ch9", "ch10", "ch11",
328+
"ch12", "ch13", "ch14", "ch15";
329+
clocks = <&cpg CPG_MOD 217>;
330+
clock-names = "fck";
331+
power-domains = <&sysc 32>;
332+
resets = <&cpg 217>;
333+
#dma-cells = <1>;
334+
dma-channels = <16>;
245335
};
246336

247337
scif0: serial@e6e60000 {

0 commit comments

Comments
 (0)