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Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 fixes from Catalin Marinas: - Cortex-A76 erratum workaround - ftrace fix to enable syscall events on arm64 - Fix uninitialised pointer in iort_get_platform_device_domain() * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: ACPI/IORT: Fix iort_get_platform_device_domain() uninitialized pointer value arm64: ftrace: Fix to enable syscall events on arm64 arm64: Add workaround for Cortex-A76 erratum 1286807
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Documentation/arm64/silicon-errata.txt

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@@ -57,6 +57,7 @@ stable kernels.
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| ARM | Cortex-A73 | #858921 | ARM64_ERRATUM_858921 |
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| ARM | Cortex-A55 | #1024718 | ARM64_ERRATUM_1024718 |
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| ARM | Cortex-A76 | #1188873 | ARM64_ERRATUM_1188873 |
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| ARM | Cortex-A76 | #1286807 | ARM64_ERRATUM_1286807 |
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| ARM | MMU-500 | #841119,#826419 | N/A |
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| | | | |
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| Cavium | ThunderX ITS | #22375, #24313 | CAVIUM_ERRATUM_22375 |

arch/arm64/Kconfig

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@@ -497,6 +497,24 @@ config ARM64_ERRATUM_1188873
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If unsure, say Y.
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config ARM64_ERRATUM_1286807
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bool "Cortex-A76: Modification of the translation table for a virtual address might lead to read-after-read ordering violation"
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default y
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select ARM64_WORKAROUND_REPEAT_TLBI
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help
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This option adds workaround for ARM Cortex-A76 erratum 1286807
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On the affected Cortex-A76 cores (r0p0 to r3p0), if a virtual
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address for a cacheable mapping of a location is being
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accessed by a core while another core is remapping the virtual
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address to a new physical page using the recommended
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break-before-make sequence, then under very rare circumstances
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TLBI+DSB completes before a read using the translation being
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invalidated has been observed by other observers. The
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workaround repeats the TLBI+DSB operation.
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If unsure, say Y.
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config CAVIUM_ERRATUM_22375
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bool "Cavium erratum 22375, 24313"
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default y
@@ -566,9 +584,16 @@ config QCOM_FALKOR_ERRATUM_1003
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is unchanged. Work around the erratum by invalidating the walk cache
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entries for the trampoline before entering the kernel proper.
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config ARM64_WORKAROUND_REPEAT_TLBI
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bool
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help
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Enable the repeat TLBI workaround for Falkor erratum 1009 and
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Cortex-A76 erratum 1286807.
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config QCOM_FALKOR_ERRATUM_1009
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bool "Falkor E1009: Prematurely complete a DSB after a TLBI"
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default y
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select ARM64_WORKAROUND_REPEAT_TLBI
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help
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On Falkor v1, the CPU may prematurely complete a DSB following a
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TLBI xxIS invalidate maintenance operation. Repeat the TLBI operation

arch/arm64/include/asm/ftrace.h

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@@ -56,6 +56,19 @@ static inline bool arch_trace_is_compat_syscall(struct pt_regs *regs)
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{
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return is_compat_task();
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}
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#define ARCH_HAS_SYSCALL_MATCH_SYM_NAME
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static inline bool arch_syscall_match_sym_name(const char *sym,
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const char *name)
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{
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/*
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* Since all syscall functions have __arm64_ prefix, we must skip it.
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* However, as we described above, we decided to ignore compat
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* syscalls, so we don't care about __arm64_compat_ prefix here.
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*/
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return !strcmp(sym + 8, name);
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}
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#endif /* ifndef __ASSEMBLY__ */
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#endif /* __ASM_FTRACE_H */

arch/arm64/include/asm/tlbflush.h

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@@ -41,14 +41,14 @@
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ALTERNATIVE("nop\n nop", \
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"dsb ish\n tlbi " #op, \
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ARM64_WORKAROUND_REPEAT_TLBI, \
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CONFIG_QCOM_FALKOR_ERRATUM_1009) \
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CONFIG_ARM64_WORKAROUND_REPEAT_TLBI) \
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: : )
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#define __TLBI_1(op, arg) asm ("tlbi " #op ", %0\n" \
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ALTERNATIVE("nop\n nop", \
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"dsb ish\n tlbi " #op ", %0", \
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ARM64_WORKAROUND_REPEAT_TLBI, \
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CONFIG_QCOM_FALKOR_ERRATUM_1009) \
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CONFIG_ARM64_WORKAROUND_REPEAT_TLBI) \
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: : "r" (arg))
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#define __TLBI_N(op, arg, n, ...) __TLBI_##n(op, arg)

arch/arm64/kernel/cpu_errata.c

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@@ -570,6 +570,20 @@ static const struct midr_range arm64_harden_el2_vectors[] = {
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#endif
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#ifdef CONFIG_ARM64_WORKAROUND_REPEAT_TLBI
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static const struct midr_range arm64_repeat_tlbi_cpus[] = {
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#ifdef CONFIG_QCOM_FALKOR_ERRATUM_1009
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MIDR_RANGE(MIDR_QCOM_FALKOR_V1, 0, 0, 0, 0),
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#endif
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#ifdef CONFIG_ARM64_ERRATUM_1286807
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MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 3, 0),
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#endif
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{},
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};
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#endif
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const struct arm64_cpu_capabilities arm64_errata[] = {
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#if defined(CONFIG_ARM64_ERRATUM_826319) || \
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defined(CONFIG_ARM64_ERRATUM_827319) || \
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.matches = is_kryo_midr,
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},
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#endif
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#ifdef CONFIG_QCOM_FALKOR_ERRATUM_1009
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#ifdef CONFIG_ARM64_WORKAROUND_REPEAT_TLBI
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{
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.desc = "Qualcomm Technologies Falkor erratum 1009",
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.desc = "Qualcomm erratum 1009, ARM erratum 1286807",
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.capability = ARM64_WORKAROUND_REPEAT_TLBI,
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ERRATA_MIDR_REV(MIDR_QCOM_FALKOR_V1, 0, 0),
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ERRATA_MIDR_RANGE_LIST(arm64_repeat_tlbi_cpus),
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},
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#endif
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#ifdef CONFIG_ARM64_ERRATUM_858921

drivers/acpi/arm64/iort.c

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@@ -700,7 +700,7 @@ static void iort_set_device_domain(struct device *dev,
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*/
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static struct irq_domain *iort_get_platform_device_domain(struct device *dev)
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{
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struct acpi_iort_node *node, *msi_parent;
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struct acpi_iort_node *node, *msi_parent = NULL;
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struct fwnode_handle *iort_fwnode;
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struct acpi_iort_its_group *its;
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int i;

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