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clk: qcom: Simplify gdsc status checking logic
The code is complicated because we want to check if the GDSC is enabled or disabled based on different bits in different registers while the GDSC hardware is slightly different across chips. Furthermore, we poll the status of the enable or disable state by checking if the gdsc is enabled or not, and then comparing that to if the gdsc is being enabled or disabled. Let's push all that into one function, so we can ask if the status matches what we want, either on or off. Then the call site can just ask that question, and the logic to check that state can simply return yes or no, and not 1 or 0 or 0 or 1 depending on if we're enabling or disabling respectively. Tested-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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‎drivers/clk/qcom/gdsc.c

Lines changed: 37 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -50,29 +50,46 @@
5050

5151
#define domain_to_gdsc(domain) container_of(domain, struct gdsc, pd)
5252

53-
static int gdsc_is_enabled(struct gdsc *sc, bool en)
53+
enum gdsc_status {
54+
GDSC_OFF,
55+
GDSC_ON
56+
};
57+
58+
/* Returns 1 if GDSC status is status, 0 if not, and < 0 on error */
59+
static int gdsc_check_status(struct gdsc *sc, enum gdsc_status status)
5460
{
5561
unsigned int reg;
5662
u32 val;
5763
int ret;
5864

5965
if (sc->flags & POLL_CFG_GDSCR)
6066
reg = sc->gdscr + CFG_GDSCR_OFFSET;
67+
else if (sc->gds_hw_ctrl)
68+
reg = sc->gds_hw_ctrl;
6169
else
62-
reg = sc->gds_hw_ctrl ? sc->gds_hw_ctrl : sc->gdscr;
70+
reg = sc->gdscr;
6371

6472
ret = regmap_read(sc->regmap, reg, &val);
6573
if (ret)
6674
return ret;
6775

6876
if (sc->flags & POLL_CFG_GDSCR) {
69-
if (en)
77+
switch (status) {
78+
case GDSC_ON:
7079
return !!(val & GDSC_POWER_UP_COMPLETE);
71-
else
72-
return !(val & GDSC_POWER_DOWN_COMPLETE);
80+
case GDSC_OFF:
81+
return !!(val & GDSC_POWER_DOWN_COMPLETE);
82+
}
83+
}
84+
85+
switch (status) {
86+
case GDSC_ON:
87+
return !!(val & PWR_ON_MASK);
88+
case GDSC_OFF:
89+
return !(val & PWR_ON_MASK);
7390
}
7491

75-
return !!(val & PWR_ON_MASK);
92+
return -EINVAL;
7693
}
7794

7895
static int gdsc_hwctrl(struct gdsc *sc, bool en)
@@ -82,33 +99,33 @@ static int gdsc_hwctrl(struct gdsc *sc, bool en)
8299
return regmap_update_bits(sc->regmap, sc->gdscr, HW_CONTROL_MASK, val);
83100
}
84101

85-
static int gdsc_poll_status(struct gdsc *sc, bool en)
102+
static int gdsc_poll_status(struct gdsc *sc, enum gdsc_status status)
86103
{
87104
ktime_t start;
88105

89106
start = ktime_get();
90107
do {
91-
if (gdsc_is_enabled(sc, en) == en)
108+
if (gdsc_check_status(sc, status))
92109
return 0;
93110
} while (ktime_us_delta(ktime_get(), start) < TIMEOUT_US);
94111

95-
if (gdsc_is_enabled(sc, en) == en)
112+
if (gdsc_check_status(sc, status))
96113
return 0;
97114

98115
return -ETIMEDOUT;
99116
}
100117

101-
static int gdsc_toggle_logic(struct gdsc *sc, bool en)
118+
static int gdsc_toggle_logic(struct gdsc *sc, enum gdsc_status status)
102119
{
103120
int ret;
104-
u32 val = en ? 0 : SW_COLLAPSE_MASK;
121+
u32 val = (status == GDSC_ON) ? 0 : SW_COLLAPSE_MASK;
105122

106123
ret = regmap_update_bits(sc->regmap, sc->gdscr, SW_COLLAPSE_MASK, val);
107124
if (ret)
108125
return ret;
109126

110127
/* If disabling votable gdscs, don't poll on status */
111-
if ((sc->flags & VOTABLE) && !en) {
128+
if ((sc->flags & VOTABLE) && status == GDSC_OFF) {
112129
/*
113130
* Add a short delay here to ensure that an enable
114131
* right after it was disabled does not put it in an
@@ -118,7 +135,7 @@ static int gdsc_toggle_logic(struct gdsc *sc, bool en)
118135
return 0;
119136
}
120137

121-
if (sc->gds_hw_ctrl)
138+
if (sc->gds_hw_ctrl) {
122139
/*
123140
* The gds hw controller asserts/de-asserts the status bit soon
124141
* after it receives a power on/off request from a master.
@@ -130,8 +147,9 @@ static int gdsc_toggle_logic(struct gdsc *sc, bool en)
130147
* and polling the status bit.
131148
*/
132149
udelay(1);
150+
}
133151

134-
return gdsc_poll_status(sc, en);
152+
return gdsc_poll_status(sc, status);
135153
}
136154

137155
static inline int gdsc_deassert_reset(struct gdsc *sc)
@@ -210,7 +228,7 @@ static int gdsc_enable(struct generic_pm_domain *domain)
210228
gdsc_deassert_clamp_io(sc);
211229
}
212230

213-
ret = gdsc_toggle_logic(sc, true);
231+
ret = gdsc_toggle_logic(sc, GDSC_ON);
214232
if (ret)
215233
return ret;
216234

@@ -266,15 +284,15 @@ static int gdsc_disable(struct generic_pm_domain *domain)
266284
*/
267285
udelay(1);
268286

269-
ret = gdsc_poll_status(sc, true);
287+
ret = gdsc_poll_status(sc, GDSC_ON);
270288
if (ret)
271289
return ret;
272290
}
273291

274292
if (sc->pwrsts & PWRSTS_OFF)
275293
gdsc_clear_mem_on(sc);
276294

277-
ret = gdsc_toggle_logic(sc, false);
295+
ret = gdsc_toggle_logic(sc, GDSC_OFF);
278296
if (ret)
279297
return ret;
280298

@@ -303,12 +321,12 @@ static int gdsc_init(struct gdsc *sc)
303321

304322
/* Force gdsc ON if only ON state is supported */
305323
if (sc->pwrsts == PWRSTS_ON) {
306-
ret = gdsc_toggle_logic(sc, true);
324+
ret = gdsc_toggle_logic(sc, GDSC_ON);
307325
if (ret)
308326
return ret;
309327
}
310328

311-
on = gdsc_is_enabled(sc, true);
329+
on = gdsc_check_status(sc, GDSC_ON);
312330
if (on < 0)
313331
return on;
314332

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