|
37 | 37 | * support descriptor writeback.
|
38 | 38 | */
|
39 | 39 |
|
40 |
| -static inline bool is_request_line_unset(struct dw_dma_chan *dwc) |
41 |
| -{ |
42 |
| - return dwc->request_line == (typeof(dwc->request_line))~0; |
43 |
| -} |
44 |
| - |
45 |
| -static inline void dwc_set_masters(struct dw_dma_chan *dwc) |
46 |
| -{ |
47 |
| - struct dw_dma *dw = to_dw_dma(dwc->chan.device); |
48 |
| - struct dw_dma_slave *dws = dwc->chan.private; |
49 |
| - unsigned char mmax = dw->nr_masters - 1; |
50 |
| - |
51 |
| - if (!is_request_line_unset(dwc)) |
52 |
| - return; |
53 |
| - |
54 |
| - dwc->src_master = min_t(unsigned char, mmax, dwc_get_sms(dws)); |
55 |
| - dwc->dst_master = min_t(unsigned char, mmax, dwc_get_dms(dws)); |
56 |
| -} |
57 |
| - |
58 | 40 | #define DWC_DEFAULT_CTLLO(_chan) ({ \
|
59 | 41 | struct dw_dma_chan *_dwc = to_dw_dma_chan(_chan); \
|
60 | 42 | struct dma_slave_config *_sconfig = &_dwc->dma_sconfig; \
|
@@ -158,10 +140,8 @@ static void dwc_initialize(struct dw_dma_chan *dwc)
|
158 | 140 | cfghi |= DWC_CFGH_DST_PER(dws->dst_id);
|
159 | 141 | cfghi |= DWC_CFGH_SRC_PER(dws->src_id);
|
160 | 142 | } else {
|
161 |
| - if (dwc->direction == DMA_MEM_TO_DEV) |
162 |
| - cfghi = DWC_CFGH_DST_PER(dwc->request_line); |
163 |
| - else if (dwc->direction == DMA_DEV_TO_MEM) |
164 |
| - cfghi = DWC_CFGH_SRC_PER(dwc->request_line); |
| 143 | + cfghi |= DWC_CFGH_DST_PER(dwc->dst_id); |
| 144 | + cfghi |= DWC_CFGH_SRC_PER(dwc->src_id); |
165 | 145 | }
|
166 | 146 |
|
167 | 147 | channel_writel(dwc, CFG_LO, cfglo);
|
@@ -967,10 +947,6 @@ set_runtime_config(struct dma_chan *chan, struct dma_slave_config *sconfig)
|
967 | 947 | memcpy(&dwc->dma_sconfig, sconfig, sizeof(*sconfig));
|
968 | 948 | dwc->direction = sconfig->direction;
|
969 | 949 |
|
970 |
| - /* Take the request line from slave_id member */ |
971 |
| - if (is_request_line_unset(dwc)) |
972 |
| - dwc->request_line = sconfig->slave_id; |
973 |
| - |
974 | 950 | convert_burst(&dwc->dma_sconfig.src_maxburst);
|
975 | 951 | convert_burst(&dwc->dma_sconfig.dst_maxburst);
|
976 | 952 |
|
@@ -1123,8 +1099,6 @@ static int dwc_alloc_chan_resources(struct dma_chan *chan)
|
1123 | 1099 | * doesn't mean what you think it means), and status writeback.
|
1124 | 1100 | */
|
1125 | 1101 |
|
1126 |
| - dwc_set_masters(dwc); |
1127 |
| - |
1128 | 1102 | spin_lock_irqsave(&dwc->lock, flags);
|
1129 | 1103 | i = dwc->descs_allocated;
|
1130 | 1104 | while (dwc->descs_allocated < NR_DESCS_PER_CHANNEL) {
|
@@ -1182,7 +1156,6 @@ static void dwc_free_chan_resources(struct dma_chan *chan)
|
1182 | 1156 | list_splice_init(&dwc->free_list, &list);
|
1183 | 1157 | dwc->descs_allocated = 0;
|
1184 | 1158 | dwc->initialized = false;
|
1185 |
| - dwc->request_line = ~0; |
1186 | 1159 |
|
1187 | 1160 | /* Disable interrupts */
|
1188 | 1161 | channel_clear_bit(dw, MASK.XFER, dwc->mask);
|
@@ -1604,7 +1577,6 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
|
1604 | 1577 | channel_clear_bit(dw, CH_EN, dwc->mask);
|
1605 | 1578 |
|
1606 | 1579 | dwc->direction = DMA_TRANS_NONE;
|
1607 |
| - dwc->request_line = ~0; |
1608 | 1580 |
|
1609 | 1581 | /* Hardware configuration */
|
1610 | 1582 | if (autocfg) {
|
|
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