@@ -323,6 +323,8 @@ static const struct rk_gmac_ops rk3288_ops = {
323
323
324
324
#define RK3328_GRF_MAC_CON0 0x0900
325
325
#define RK3328_GRF_MAC_CON1 0x0904
326
+ #define RK3328_GRF_MAC_CON2 0x0908
327
+ #define RK3328_GRF_MACPHY_CON1 0xb04
326
328
327
329
/* RK3328_GRF_MAC_CON0 */
328
330
#define RK3328_GMAC_CLK_RX_DL_CFG (val ) HIWORD_UPDATE(val, 0x7F, 7)
@@ -349,6 +351,9 @@ static const struct rk_gmac_ops rk3288_ops = {
349
351
#define RK3328_GMAC_RXCLK_DLY_ENABLE GRF_BIT(1)
350
352
#define RK3328_GMAC_RXCLK_DLY_DISABLE GRF_CLR_BIT(0)
351
353
354
+ /* RK3328_GRF_MACPHY_CON1 */
355
+ #define RK3328_MACPHY_RMII_MODE GRF_BIT(9)
356
+
352
357
static void rk3328_set_to_rgmii (struct rk_priv_data * bsp_priv ,
353
358
int tx_delay , int rx_delay )
354
359
{
@@ -373,13 +378,17 @@ static void rk3328_set_to_rgmii(struct rk_priv_data *bsp_priv,
373
378
static void rk3328_set_to_rmii (struct rk_priv_data * bsp_priv )
374
379
{
375
380
struct device * dev = & bsp_priv -> pdev -> dev ;
381
+ unsigned int reg ;
376
382
377
383
if (IS_ERR (bsp_priv -> grf )) {
378
384
dev_err (dev , "Missing rockchip,grf property\n" );
379
385
return ;
380
386
}
381
387
382
- regmap_write (bsp_priv -> grf , RK3328_GRF_MAC_CON1 ,
388
+ reg = bsp_priv -> integrated_phy ? RK3328_GRF_MAC_CON2 :
389
+ RK3328_GRF_MAC_CON1 ;
390
+
391
+ regmap_write (bsp_priv -> grf , reg ,
383
392
RK3328_GMAC_PHY_INTF_SEL_RMII |
384
393
RK3328_GMAC_RMII_MODE );
385
394
}
@@ -409,29 +418,40 @@ static void rk3328_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed)
409
418
static void rk3328_set_rmii_speed (struct rk_priv_data * bsp_priv , int speed )
410
419
{
411
420
struct device * dev = & bsp_priv -> pdev -> dev ;
421
+ unsigned int reg ;
412
422
413
423
if (IS_ERR (bsp_priv -> grf )) {
414
424
dev_err (dev , "Missing rockchip,grf property\n" );
415
425
return ;
416
426
}
417
427
428
+ reg = bsp_priv -> integrated_phy ? RK3328_GRF_MAC_CON2 :
429
+ RK3328_GRF_MAC_CON1 ;
430
+
418
431
if (speed == 10 )
419
- regmap_write (bsp_priv -> grf , RK3328_GRF_MAC_CON1 ,
432
+ regmap_write (bsp_priv -> grf , reg ,
420
433
RK3328_GMAC_RMII_CLK_2_5M |
421
434
RK3328_GMAC_SPEED_10M );
422
435
else if (speed == 100 )
423
- regmap_write (bsp_priv -> grf , RK3328_GRF_MAC_CON1 ,
436
+ regmap_write (bsp_priv -> grf , reg ,
424
437
RK3328_GMAC_RMII_CLK_25M |
425
438
RK3328_GMAC_SPEED_100M );
426
439
else
427
440
dev_err (dev , "unknown speed value for RMII! speed=%d" , speed );
428
441
}
429
442
443
+ static void rk3328_integrated_phy_powerup (struct rk_priv_data * priv )
444
+ {
445
+ regmap_write (priv -> grf , RK3328_GRF_MACPHY_CON1 ,
446
+ RK3328_MACPHY_RMII_MODE );
447
+ }
448
+
430
449
static const struct rk_gmac_ops rk3328_ops = {
431
450
.set_to_rgmii = rk3328_set_to_rgmii ,
432
451
.set_to_rmii = rk3328_set_to_rmii ,
433
452
.set_rgmii_speed = rk3328_set_rgmii_speed ,
434
453
.set_rmii_speed = rk3328_set_rmii_speed ,
454
+ .integrated_phy_powerup = rk3328_integrated_phy_powerup ,
435
455
};
436
456
437
457
#define RK3366_GRF_SOC_CON6 0x0418
0 commit comments