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cmsantarodrigovivi
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drm/i915: Remove .is_mobile field from platform struct
As recommended by Ville Syrjala removing .is_mobile field from the platform struct definition for vlv and hsw+ GPUs as there's no need to make the distinction in later hardware anymore. Keep it for older GPUs as it is still needed for ilk-ivb. Signed-off-by: Carlos Santa <carlos.santa@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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+25
-67
lines changed

3 files changed

+25
-67
lines changed

arch/x86/kernel/early-quirks.c

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -507,8 +507,7 @@ static const struct pci_device_id intel_early_ids[] __initconst = {
507507
INTEL_I915GM_IDS(&gen3_early_ops),
508508
INTEL_I945G_IDS(&gen3_early_ops),
509509
INTEL_I945GM_IDS(&gen3_early_ops),
510-
INTEL_VLV_M_IDS(&gen6_early_ops),
511-
INTEL_VLV_D_IDS(&gen6_early_ops),
510+
INTEL_VLV_IDS(&gen6_early_ops),
512511
INTEL_PINEVIEW_IDS(&gen3_early_ops),
513512
INTEL_I965G_IDS(&gen3_early_ops),
514513
INTEL_G33_IDS(&gen3_early_ops),
@@ -521,10 +520,8 @@ static const struct pci_device_id intel_early_ids[] __initconst = {
521520
INTEL_SNB_M_IDS(&gen6_early_ops),
522521
INTEL_IVB_M_IDS(&gen6_early_ops),
523522
INTEL_IVB_D_IDS(&gen6_early_ops),
524-
INTEL_HSW_D_IDS(&gen6_early_ops),
525-
INTEL_HSW_M_IDS(&gen6_early_ops),
526-
INTEL_BDW_M_IDS(&gen8_early_ops),
527-
INTEL_BDW_D_IDS(&gen8_early_ops),
523+
INTEL_HSW_IDS(&gen6_early_ops),
524+
INTEL_BDW_IDS(&gen8_early_ops),
528525
INTEL_CHV_IDS(&chv_early_ops),
529526
INTEL_SKL_IDS(&gen9_early_ops),
530527
INTEL_BXT_IDS(&gen9_early_ops),

drivers/gpu/drm/i915/i915_pci.c

Lines changed: 8 additions & 37 deletions
Original file line numberDiff line numberDiff line change
@@ -250,13 +250,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
250250
GEN_DEFAULT_PIPEOFFSETS, \
251251
CURSOR_OFFSETS
252252

253-
static const struct intel_device_info intel_valleyview_m_info = {
254-
VLV_FEATURES,
255-
.is_valleyview = 1,
256-
.is_mobile = 1,
257-
};
258-
259-
static const struct intel_device_info intel_valleyview_d_info = {
253+
static const struct intel_device_info intel_valleyview_info = {
260254
VLV_FEATURES,
261255
.is_valleyview = 1,
262256
};
@@ -268,47 +262,28 @@ static const struct intel_device_info intel_valleyview_d_info = {
268262
.has_fpga_dbg = 1, \
269263
.has_psr = 1
270264

271-
static const struct intel_device_info intel_haswell_d_info = {
265+
static const struct intel_device_info intel_haswell_info = {
272266
HSW_FEATURES,
273267
.is_haswell = 1,
274268
};
275269

276-
static const struct intel_device_info intel_haswell_m_info = {
277-
HSW_FEATURES,
278-
.is_haswell = 1,
279-
.is_mobile = 1,
280-
};
281-
282270
#define BDW_FEATURES \
283271
HSW_FEATURES, \
284272
BDW_COLORS
285273

286-
static const struct intel_device_info intel_broadwell_d_info = {
274+
static const struct intel_device_info intel_broadwell_info = {
287275
BDW_FEATURES,
288276
.gen = 8,
289277
.is_broadwell = 1,
290278
};
291279

292-
static const struct intel_device_info intel_broadwell_m_info = {
293-
BDW_FEATURES,
294-
.gen = 8, .is_mobile = 1,
295-
.is_broadwell = 1,
296-
};
297-
298-
static const struct intel_device_info intel_broadwell_gt3d_info = {
280+
static const struct intel_device_info intel_broadwell_gt3_info = {
299281
BDW_FEATURES,
300282
.gen = 8,
301283
.is_broadwell = 1,
302284
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
303285
};
304286

305-
static const struct intel_device_info intel_broadwell_gt3m_info = {
306-
BDW_FEATURES,
307-
.gen = 8, .is_mobile = 1,
308-
.is_broadwell = 1,
309-
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
310-
};
311-
312287
static const struct intel_device_info intel_cherryview_info = {
313288
.gen = 8, .num_pipes = 3,
314289
.need_gfx_hws = 1, .has_hotplug = 1,
@@ -390,14 +365,10 @@ static const struct pci_device_id pciidlist[] = {
390365
INTEL_IVB_Q_IDS(&intel_ivybridge_q_info), /* must be first IVB */
391366
INTEL_IVB_M_IDS(&intel_ivybridge_m_info),
392367
INTEL_IVB_D_IDS(&intel_ivybridge_d_info),
393-
INTEL_HSW_D_IDS(&intel_haswell_d_info),
394-
INTEL_HSW_M_IDS(&intel_haswell_m_info),
395-
INTEL_VLV_M_IDS(&intel_valleyview_m_info),
396-
INTEL_VLV_D_IDS(&intel_valleyview_d_info),
397-
INTEL_BDW_GT12M_IDS(&intel_broadwell_m_info),
398-
INTEL_BDW_GT12D_IDS(&intel_broadwell_d_info),
399-
INTEL_BDW_GT3M_IDS(&intel_broadwell_gt3m_info),
400-
INTEL_BDW_GT3D_IDS(&intel_broadwell_gt3d_info),
368+
INTEL_HSW_IDS(&intel_haswell_info),
369+
INTEL_VLV_IDS(&intel_valleyview_info),
370+
INTEL_BDW_GT12_IDS(&intel_broadwell_info),
371+
INTEL_BDW_GT3_IDS(&intel_broadwell_gt3_info),
401372
INTEL_CHV_IDS(&intel_cherryview_info),
402373
INTEL_SKL_GT1_IDS(&intel_skylake_info),
403374
INTEL_SKL_GT2_IDS(&intel_skylake_info),

include/drm/i915_pciids.h

Lines changed: 14 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -134,7 +134,7 @@
134134
#define INTEL_IVB_Q_IDS(info) \
135135
INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */
136136

137-
#define INTEL_HSW_D_IDS(info) \
137+
#define INTEL_HSW_IDS(info) \
138138
INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \
139139
INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \
140140
INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \
@@ -179,9 +179,7 @@
179179
INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \
180180
INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \
181181
INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \
182-
INTEL_VGA_DEVICE(0x0D2E, info) /* CRW GT3 reserved */ \
183-
184-
#define INTEL_HSW_M_IDS(info) \
182+
INTEL_VGA_DEVICE(0x0D2E, info), /* CRW GT3 reserved */ \
185183
INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \
186184
INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \
187185
INTEL_VGA_DEVICE(0x0426, info), /* GT2 mobile */ \
@@ -198,39 +196,33 @@
198196
INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \
199197
INTEL_VGA_DEVICE(0x0D26, info) /* CRW GT3 mobile */
200198

201-
#define INTEL_VLV_M_IDS(info) \
199+
#define INTEL_VLV_IDS(info) \
202200
INTEL_VGA_DEVICE(0x0f30, info), \
203201
INTEL_VGA_DEVICE(0x0f31, info), \
204202
INTEL_VGA_DEVICE(0x0f32, info), \
205203
INTEL_VGA_DEVICE(0x0f33, info), \
206-
INTEL_VGA_DEVICE(0x0157, info)
207-
208-
#define INTEL_VLV_D_IDS(info) \
204+
INTEL_VGA_DEVICE(0x0157, info), \
209205
INTEL_VGA_DEVICE(0x0155, info)
210206

211-
#define INTEL_BDW_GT12M_IDS(info) \
207+
#define INTEL_BDW_GT12_IDS(info) \
212208
INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \
213209
INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \
214210
INTEL_VGA_DEVICE(0x160B, info), /* GT1 Iris */ \
215211
INTEL_VGA_DEVICE(0x160E, info), /* GT1 ULX */ \
216212
INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */ \
217213
INTEL_VGA_DEVICE(0x1616, info), /* GT2 ULT */ \
218214
INTEL_VGA_DEVICE(0x161B, info), /* GT2 ULT */ \
219-
INTEL_VGA_DEVICE(0x161E, info) /* GT2 ULX */
220-
221-
#define INTEL_BDW_GT12D_IDS(info) \
215+
INTEL_VGA_DEVICE(0x161E, info), /* GT2 ULX */ \
222216
INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \
223217
INTEL_VGA_DEVICE(0x160D, info), /* GT1 Workstation */ \
224218
INTEL_VGA_DEVICE(0x161A, info), /* GT2 Server */ \
225219
INTEL_VGA_DEVICE(0x161D, info) /* GT2 Workstation */
226220

227-
#define INTEL_BDW_GT3M_IDS(info) \
221+
#define INTEL_BDW_GT3_IDS(info) \
228222
INTEL_VGA_DEVICE(0x1622, info), /* ULT */ \
229223
INTEL_VGA_DEVICE(0x1626, info), /* ULT */ \
230224
INTEL_VGA_DEVICE(0x162B, info), /* Iris */ \
231-
INTEL_VGA_DEVICE(0x162E, info) /* ULX */
232-
233-
#define INTEL_BDW_GT3D_IDS(info) \
225+
INTEL_VGA_DEVICE(0x162E, info), /* ULX */\
234226
INTEL_VGA_DEVICE(0x162A, info), /* Server */ \
235227
INTEL_VGA_DEVICE(0x162D, info) /* Workstation */
236228

@@ -244,14 +236,12 @@
244236
INTEL_VGA_DEVICE(0x163A, info), /* Server */ \
245237
INTEL_VGA_DEVICE(0x163D, info) /* Workstation */
246238

247-
#define INTEL_BDW_M_IDS(info) \
248-
INTEL_BDW_GT12M_IDS(info), \
249-
INTEL_BDW_GT3M_IDS(info), \
250-
INTEL_BDW_RSVDM_IDS(info)
251-
252-
#define INTEL_BDW_D_IDS(info) \
253-
INTEL_BDW_GT12D_IDS(info), \
254-
INTEL_BDW_GT3D_IDS(info), \
239+
#define INTEL_BDW_IDS(info) \
240+
INTEL_BDW_GT12_IDS(info), \
241+
INTEL_BDW_GT3_IDS(info), \
242+
INTEL_BDW_RSVDM_IDS(info), \
243+
INTEL_BDW_GT12_IDS(info), \
244+
INTEL_BDW_GT3_IDS(info), \
255245
INTEL_BDW_RSVDD_IDS(info)
256246

257247
#define INTEL_CHV_IDS(info) \

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