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| 1 | +Amlogic Meson Power Controller |
| 2 | +============================== |
| 3 | + |
| 4 | +The Amlogic Meson SoCs embeds an internal Power domain controller. |
| 5 | + |
| 6 | +VPU Power Domain |
| 7 | +---------------- |
| 8 | + |
| 9 | +The Video Processing Unit power domain is controlled by this power controller, |
| 10 | +but the domain requires some external resources to meet the correct power |
| 11 | +sequences. |
| 12 | +The bindings must respect the power domain bindings as described in the file |
| 13 | +power_domain.txt |
| 14 | + |
| 15 | +Device Tree Bindings: |
| 16 | +--------------------- |
| 17 | + |
| 18 | +Required properties: |
| 19 | +- compatible: should be "amlogic,meson-gx-pwrc-vpu" for the Meson GX SoCs |
| 20 | +- #power-domain-cells: should be 0 |
| 21 | +- amlogic,hhi-sysctrl: phandle to the HHI sysctrl node |
| 22 | +- resets: phandles to the reset lines needed for this power demain sequence |
| 23 | + as described in ../reset/reset.txt |
| 24 | +- clocks: from common clock binding: handle to VPU and VAPB clocks |
| 25 | +- clock-names: from common clock binding: must contain "vpu", "vapb" |
| 26 | + corresponding to entry in the clocks property. |
| 27 | + |
| 28 | +Parent node should have the following properties : |
| 29 | +- compatible: "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd" |
| 30 | +- reg: base address and size of the AO system control register space. |
| 31 | + |
| 32 | +Example: |
| 33 | +------- |
| 34 | + |
| 35 | +ao_sysctrl: sys-ctrl@0 { |
| 36 | + compatible = "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd"; |
| 37 | + reg = <0x0 0x0 0x0 0x100>; |
| 38 | + |
| 39 | + pwrc_vpu: power-controller-vpu { |
| 40 | + compatible = "amlogic,meson-gx-pwrc-vpu"; |
| 41 | + #power-domain-cells = <0>; |
| 42 | + amlogic,hhi-sysctrl = <&sysctrl>; |
| 43 | + resets = <&reset RESET_VIU>, |
| 44 | + <&reset RESET_VENC>, |
| 45 | + <&reset RESET_VCBUS>, |
| 46 | + <&reset RESET_BT656>, |
| 47 | + <&reset RESET_DVIN_RESET>, |
| 48 | + <&reset RESET_RDMA>, |
| 49 | + <&reset RESET_VENCI>, |
| 50 | + <&reset RESET_VENCP>, |
| 51 | + <&reset RESET_VDAC>, |
| 52 | + <&reset RESET_VDI6>, |
| 53 | + <&reset RESET_VENCL>, |
| 54 | + <&reset RESET_VID_LOCK>; |
| 55 | + clocks = <&clkc CLKID_VPU>, |
| 56 | + <&clkc CLKID_VAPB>; |
| 57 | + clock-names = "vpu", "vapb"; |
| 58 | + }; |
| 59 | +}; |
| 60 | + |
| 61 | + |
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