Skip to content

Commit 92418fb

Browse files
Alexander DuyckJeff Kirsher
Alexander Duyck
authored and
Jeff Kirsher
committed
i40e/i40evf: Use usec value instead of reg value for ITR defines
Instead of using the register value for the defines when setting up the ring ITR we can just use the actual values and avoid the use of shifts and macros to translate between the values we have and the values we want. This helps to make the code more readable as we can quickly translate from one value to the other. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
1 parent 4ff1792 commit 92418fb

File tree

6 files changed

+79
-56
lines changed

6 files changed

+79
-56
lines changed

‎drivers/net/ethernet/intel/i40e/i40e_ethtool.c

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -2315,8 +2315,8 @@ static void i40e_set_itr_per_queue(struct i40e_vsi *vsi,
23152315

23162316
intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit);
23172317

2318-
rx_ring->itr_setting = ec->rx_coalesce_usecs;
2319-
tx_ring->itr_setting = ec->tx_coalesce_usecs;
2318+
rx_ring->itr_setting = ITR_REG_ALIGN(ec->rx_coalesce_usecs);
2319+
tx_ring->itr_setting = ITR_REG_ALIGN(ec->tx_coalesce_usecs);
23202320

23212321
if (ec->use_adaptive_rx_coalesce)
23222322
rx_ring->itr_setting |= I40E_ITR_DYNAMIC;
@@ -2396,7 +2396,7 @@ static int __i40e_set_coalesce(struct net_device *netdev,
23962396
return -EINVAL;
23972397
}
23982398

2399-
if (ec->rx_coalesce_usecs > (I40E_MAX_ITR << 1)) {
2399+
if (ec->rx_coalesce_usecs > I40E_MAX_ITR) {
24002400
netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n");
24012401
return -EINVAL;
24022402
}
@@ -2407,16 +2407,16 @@ static int __i40e_set_coalesce(struct net_device *netdev,
24072407
return -EINVAL;
24082408
}
24092409

2410-
if (ec->tx_coalesce_usecs > (I40E_MAX_ITR << 1)) {
2410+
if (ec->tx_coalesce_usecs > I40E_MAX_ITR) {
24112411
netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n");
24122412
return -EINVAL;
24132413
}
24142414

24152415
if (ec->use_adaptive_rx_coalesce && !cur_rx_itr)
2416-
ec->rx_coalesce_usecs = I40E_MIN_ITR << 1;
2416+
ec->rx_coalesce_usecs = I40E_MIN_ITR;
24172417

24182418
if (ec->use_adaptive_tx_coalesce && !cur_tx_itr)
2419-
ec->tx_coalesce_usecs = I40E_MIN_ITR << 1;
2419+
ec->tx_coalesce_usecs = I40E_MIN_ITR;
24202420

24212421
intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high);
24222422
vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg);

‎drivers/net/ethernet/intel/i40e/i40e_txrx.c

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2277,7 +2277,7 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget)
22772277
return failure ? budget : (int)total_rx_packets;
22782278
}
22792279

2280-
static u32 i40e_buildreg_itr(const int type, const u16 itr)
2280+
static inline u32 i40e_buildreg_itr(const int type, u16 itr)
22812281
{
22822282
u32 val;
22832283

@@ -2290,10 +2290,17 @@ static u32 i40e_buildreg_itr(const int type, const u16 itr)
22902290
* xxINT_DYN_CTLx CSR with INTENA_MSK (bit 31) set to 0 will clear
22912291
* an event in the PBA anyway so we need to rely on the automask
22922292
* to hold pending events for us until the interrupt is re-enabled
2293+
*
2294+
* The itr value is reported in microseconds, and the register
2295+
* value is recorded in 2 microsecond units. For this reason we
2296+
* only need to shift by the interval shift - 1 instead of the
2297+
* full value.
22932298
*/
2299+
itr &= I40E_ITR_MASK;
2300+
22942301
val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
22952302
(type << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT) |
2296-
(itr << I40E_PFINT_DYN_CTLN_INTERVAL_SHIFT);
2303+
(itr << (I40E_PFINT_DYN_CTLN_INTERVAL_SHIFT - 1));
22972304

22982305
return val;
22992306
}

‎drivers/net/ethernet/intel/i40e/i40e_txrx.h

Lines changed: 25 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -30,32 +30,37 @@
3030
#include <net/xdp.h>
3131

3232
/* Interrupt Throttling and Rate Limiting Goodies */
33-
34-
#define I40E_MAX_ITR 0x0FF0 /* reg uses 2 usec resolution */
35-
#define I40E_MIN_ITR 0x0001 /* reg uses 2 usec resolution */
36-
#define I40E_ITR_100K 0x0005
37-
#define I40E_ITR_50K 0x000A
38-
#define I40E_ITR_20K 0x0019
39-
#define I40E_ITR_18K 0x001B
40-
#define I40E_ITR_8K 0x003E
41-
#define I40E_ITR_4K 0x007A
42-
#define I40E_MAX_INTRL 0x3B /* reg uses 4 usec resolution */
43-
#define I40E_ITR_RX_DEF (ITR_REG_TO_USEC(I40E_ITR_20K) | \
44-
I40E_ITR_DYNAMIC)
45-
#define I40E_ITR_TX_DEF (ITR_REG_TO_USEC(I40E_ITR_20K) | \
46-
I40E_ITR_DYNAMIC)
47-
#define I40E_ITR_DYNAMIC 0x8000 /* use top bit as a flag */
48-
#define I40E_MIN_INT_RATE 250 /* ~= 1000000 / (I40E_MAX_ITR * 2) */
49-
#define I40E_MAX_INT_RATE 500000 /* == 1000000 / (I40E_MIN_ITR * 2) */
5033
#define I40E_DEFAULT_IRQ_WORK 256
51-
#define ITR_TO_REG(setting) ((setting & ~I40E_ITR_DYNAMIC) >> 1)
52-
#define ITR_IS_DYNAMIC(setting) (!!(setting & I40E_ITR_DYNAMIC))
53-
#define ITR_REG_TO_USEC(itr_reg) (itr_reg << 1)
34+
35+
/* The datasheet for the X710 and XL710 indicate that the maximum value for
36+
* the ITR is 8160usec which is then called out as 0xFF0 with a 2usec
37+
* resolution. 8160 is 0x1FE0 when written out in hex. So instead of storing
38+
* the register value which is divided by 2 lets use the actual values and
39+
* avoid an excessive amount of translation.
40+
*/
41+
#define I40E_ITR_DYNAMIC 0x8000 /* use top bit as a flag */
42+
#define I40E_ITR_MASK 0x1FFE /* mask for ITR register value */
43+
#define I40E_MIN_ITR 2 /* reg uses 2 usec resolution */
44+
#define I40E_ITR_100K 10 /* all values below must be even */
45+
#define I40E_ITR_50K 20
46+
#define I40E_ITR_20K 50
47+
#define I40E_ITR_18K 60
48+
#define I40E_ITR_8K 122
49+
#define I40E_MAX_ITR 8160 /* maximum value as per datasheet */
50+
#define ITR_TO_REG(setting) ((setting) & ~I40E_ITR_DYNAMIC)
51+
#define ITR_REG_ALIGN(setting) __ALIGN_MASK(setting, ~I40E_ITR_MASK)
52+
#define ITR_IS_DYNAMIC(setting) (!!((setting) & I40E_ITR_DYNAMIC))
53+
54+
#define I40E_ITR_RX_DEF (I40E_ITR_20K | I40E_ITR_DYNAMIC)
55+
#define I40E_ITR_TX_DEF (I40E_ITR_20K | I40E_ITR_DYNAMIC)
56+
5457
/* 0x40 is the enable bit for interrupt rate limiting, and must be set if
5558
* the value of the rate limit is non-zero
5659
*/
5760
#define INTRL_ENA BIT(6)
61+
#define I40E_MAX_INTRL 0x3B /* reg uses 4 usec resolution */
5862
#define INTRL_REG_TO_USEC(intrl) ((intrl & ~INTRL_ENA) << 2)
63+
5964
/**
6065
* i40e_intrl_usec_to_reg - convert interrupt rate limit to register
6166
* @intrl: interrupt rate limit to convert

‎drivers/net/ethernet/intel/i40evf/i40e_txrx.c

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1460,7 +1460,7 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget)
14601460
return failure ? budget : (int)total_rx_packets;
14611461
}
14621462

1463-
static u32 i40e_buildreg_itr(const int type, const u16 itr)
1463+
static inline u32 i40e_buildreg_itr(const int type, u16 itr)
14641464
{
14651465
u32 val;
14661466

@@ -1473,10 +1473,17 @@ static u32 i40e_buildreg_itr(const int type, const u16 itr)
14731473
* xxINT_DYN_CTLx CSR with INTENA_MSK (bit 31) set to 0 will clear
14741474
* an event in the PBA anyway so we need to rely on the automask
14751475
* to hold pending events for us until the interrupt is re-enabled
1476+
*
1477+
* The itr value is reported in microseconds, and the register
1478+
* value is recorded in 2 microsecond units. For this reason we
1479+
* only need to shift by the interval shift - 1 instead of the
1480+
* full value.
14761481
*/
1482+
itr &= I40E_ITR_MASK;
1483+
14771484
val = I40E_VFINT_DYN_CTLN1_INTENA_MASK |
14781485
(type << I40E_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) |
1479-
(itr << I40E_VFINT_DYN_CTLN1_INTERVAL_SHIFT);
1486+
(itr << (I40E_VFINT_DYN_CTLN1_INTERVAL_SHIFT - 1));
14801487

14811488
return val;
14821489
}

‎drivers/net/ethernet/intel/i40evf/i40e_txrx.h

Lines changed: 24 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -28,31 +28,35 @@
2828
#define _I40E_TXRX_H_
2929

3030
/* Interrupt Throttling and Rate Limiting Goodies */
31-
32-
#define I40E_MAX_ITR 0x0FF0 /* reg uses 2 usec resolution */
33-
#define I40E_MIN_ITR 0x0001 /* reg uses 2 usec resolution */
34-
#define I40E_ITR_100K 0x0005
35-
#define I40E_ITR_50K 0x000A
36-
#define I40E_ITR_20K 0x0019
37-
#define I40E_ITR_18K 0x001B
38-
#define I40E_ITR_8K 0x003E
39-
#define I40E_ITR_4K 0x007A
40-
#define I40E_MAX_INTRL 0x3B /* reg uses 4 usec resolution */
41-
#define I40E_ITR_RX_DEF (ITR_REG_TO_USEC(I40E_ITR_20K) | \
42-
I40E_ITR_DYNAMIC)
43-
#define I40E_ITR_TX_DEF (ITR_REG_TO_USEC(I40E_ITR_20K) | \
44-
I40E_ITR_DYNAMIC)
45-
#define I40E_ITR_DYNAMIC 0x8000 /* use top bit as a flag */
46-
#define I40E_MIN_INT_RATE 250 /* ~= 1000000 / (I40E_MAX_ITR * 2) */
47-
#define I40E_MAX_INT_RATE 500000 /* == 1000000 / (I40E_MIN_ITR * 2) */
4831
#define I40E_DEFAULT_IRQ_WORK 256
49-
#define ITR_TO_REG(setting) ((setting & ~I40E_ITR_DYNAMIC) >> 1)
50-
#define ITR_IS_DYNAMIC(setting) (!!(setting & I40E_ITR_DYNAMIC))
51-
#define ITR_REG_TO_USEC(itr_reg) (itr_reg << 1)
32+
33+
/* The datasheet for the X710 and XL710 indicate that the maximum value for
34+
* the ITR is 8160usec which is then called out as 0xFF0 with a 2usec
35+
* resolution. 8160 is 0x1FE0 when written out in hex. So instead of storing
36+
* the register value which is divided by 2 lets use the actual values and
37+
* avoid an excessive amount of translation.
38+
*/
39+
#define I40E_ITR_DYNAMIC 0x8000 /* use top bit as a flag */
40+
#define I40E_ITR_MASK 0x1FFE /* mask for ITR register value */
41+
#define I40E_MIN_ITR 2 /* reg uses 2 usec resolution */
42+
#define I40E_ITR_100K 10 /* all values below must be even */
43+
#define I40E_ITR_50K 20
44+
#define I40E_ITR_20K 50
45+
#define I40E_ITR_18K 60
46+
#define I40E_ITR_8K 122
47+
#define I40E_MAX_ITR 8160 /* maximum value as per datasheet */
48+
#define ITR_TO_REG(setting) ((setting) & ~I40E_ITR_DYNAMIC)
49+
#define ITR_REG_ALIGN(setting) __ALIGN_MASK(setting, ~I40E_ITR_MASK)
50+
#define ITR_IS_DYNAMIC(setting) (!!((setting) & I40E_ITR_DYNAMIC))
51+
52+
#define I40E_ITR_RX_DEF (I40E_ITR_20K | I40E_ITR_DYNAMIC)
53+
#define I40E_ITR_TX_DEF (I40E_ITR_20K | I40E_ITR_DYNAMIC)
54+
5255
/* 0x40 is the enable bit for interrupt rate limiting, and must be set if
5356
* the value of the rate limit is non-zero
5457
*/
5558
#define INTRL_ENA BIT(6)
59+
#define I40E_MAX_INTRL 0x3B /* reg uses 4 usec resolution */
5660
#define INTRL_REG_TO_USEC(intrl) ((intrl & ~INTRL_ENA) << 2)
5761
#define INTRL_USEC_TO_REG(set) ((set) ? ((set) >> 2) | INTRL_ENA : 0)
5862
#define I40E_INTRL_8K 125 /* 8000 ints/sec */

‎drivers/net/ethernet/intel/i40evf/i40evf_ethtool.c

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -517,8 +517,8 @@ static void i40evf_set_itr_per_queue(struct i40evf_adapter *adapter,
517517
struct i40e_hw *hw = &adapter->hw;
518518
struct i40e_q_vector *q_vector;
519519

520-
rx_ring->itr_setting = ec->rx_coalesce_usecs;
521-
tx_ring->itr_setting = ec->tx_coalesce_usecs;
520+
rx_ring->itr_setting = ITR_REG_ALIGN(ec->rx_coalesce_usecs);
521+
tx_ring->itr_setting = ITR_REG_ALIGN(ec->tx_coalesce_usecs);
522522

523523
rx_ring->itr_setting |= I40E_ITR_DYNAMIC;
524524
if (!ec->use_adaptive_rx_coalesce)
@@ -563,8 +563,8 @@ static int __i40evf_set_coalesce(struct net_device *netdev,
563563
if (ec->rx_coalesce_usecs == 0) {
564564
if (ec->use_adaptive_rx_coalesce)
565565
netif_info(adapter, drv, netdev, "rx-usecs=0, need to disable adaptive-rx for a complete disable\n");
566-
} else if ((ec->rx_coalesce_usecs < (I40E_MIN_ITR << 1)) ||
567-
(ec->rx_coalesce_usecs > (I40E_MAX_ITR << 1))) {
566+
} else if ((ec->rx_coalesce_usecs < I40E_MIN_ITR) ||
567+
(ec->rx_coalesce_usecs > I40E_MAX_ITR)) {
568568
netif_info(adapter, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n");
569569
return -EINVAL;
570570
}
@@ -573,8 +573,8 @@ static int __i40evf_set_coalesce(struct net_device *netdev,
573573
if (ec->tx_coalesce_usecs == 0) {
574574
if (ec->use_adaptive_tx_coalesce)
575575
netif_info(adapter, drv, netdev, "tx-usecs=0, need to disable adaptive-tx for a complete disable\n");
576-
} else if ((ec->tx_coalesce_usecs < (I40E_MIN_ITR << 1)) ||
577-
(ec->tx_coalesce_usecs > (I40E_MAX_ITR << 1))) {
576+
} else if ((ec->tx_coalesce_usecs < I40E_MIN_ITR) ||
577+
(ec->tx_coalesce_usecs > I40E_MAX_ITR)) {
578578
netif_info(adapter, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n");
579579
return -EINVAL;
580580
}

0 commit comments

Comments
 (0)