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Merge tag 'drm-fixes-2018-12-14' of git://anongit.freedesktop.org/drm/drm
Pull drm fixes from Dave Airlie: "While I hoped things would calm down, the world hasn't joined with me, but it's a few things scattered over a wide area. The i915 workarounds regression fix is probably the largest, the rest are more usual sized. We also get some new AMD PCI IDs. There is also a patch in here to MAINTAINERS to added Daniel as an official DRM toplevel co-maintainer, he's decided he wants to step up and share the glory, and he'll likely process next weeks fixes while I'm away on holidays. Summary: amdgpu: - some new PCI IDs - fixed firmware image updates - power management fixes - locking warning fix nouveau: - framebuffer flushing fix - memory leak fix - tegra device init regression fix vmwgfx: - OOM kernel memory fix - excess return in function fix i915: - the biggest fix is a regression fix where workarounds weren't getting reapplied after a gpu hang causing further crashing, this fixes the workaround application to make it happen again - GPU hang fixes for Braswell and some GEN3 GPUs - GVT fix for broadwell tiling rockchip: - revert to fix a regression causing a WARN on shutdown mediatek: - avoid crash attaching to non-existant bridges" * tag 'drm-fixes-2018-12-14' of git://anongit.freedesktop.org/drm/drm: (23 commits) drm/vmwgfx: Protect from excessive execbuf kernel memory allocations v3 MAINTAINERS: Daniel for drm co-maintainer drm/amdgpu: drop fclk/gfxclk ratio setting drm/vmwgfx: remove redundant return ret statement drm/i915: Flush GPU relocs harder for gen3 drm/i915: Allocate a common scratch page drm/i915/execlists: Apply a full mb before execution for Braswell drm/nouveau/kms: Fix memory leak in nv50_mstm_del() drm/nouveau/kms/nv50-: also flush fb writes when rewinding push buffer drm/amdgpu: Fix DEBUG_LOCKS_WARN_ON(depth <= 0) in amdgpu_ctx.lock Revert "drm/rockchip: Allow driver to be shutdown on reboot/kexec" drm/nouveau/drm/nouveau: tegra: Call nouveau_drm_device_init() drm/amdgpu/powerplay: Apply avfs cks-off voltages on VI drm/amdgpu: update SMC firmware image for polaris10 variants drm/amdkfd: add new vega20 pci id drm/amdkfd: add new vega10 pci ids drm/amdgpu: add some additional vega20 pci ids drm/amdgpu: add some additional vega10 pci ids drm/amdgpu: update smu firmware images for VI variants (v2) drm/i915: Introduce per-engine workarounds ...
2 parents 880b9df + 1df07a7 commit 92de1de

31 files changed

+718
-335
lines changed

‎MAINTAINERS

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4847,6 +4847,7 @@ F: include/uapi/drm/vmwgfx_drm.h
48474847

48484848
DRM DRIVERS
48494849
M: David Airlie <airlied@linux.ie>
4850+
M: Daniel Vetter <daniel@ffwll.ch>
48504851
L: dri-devel@lists.freedesktop.org
48514852
T: git git://anongit.freedesktop.org/drm/drm
48524853
B: https://bugs.freedesktop.org/

‎drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c

Lines changed: 30 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -330,7 +330,9 @@ static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device,
330330
case CHIP_TOPAZ:
331331
if (((adev->pdev->device == 0x6900) && (adev->pdev->revision == 0x81)) ||
332332
((adev->pdev->device == 0x6900) && (adev->pdev->revision == 0x83)) ||
333-
((adev->pdev->device == 0x6907) && (adev->pdev->revision == 0x87))) {
333+
((adev->pdev->device == 0x6907) && (adev->pdev->revision == 0x87)) ||
334+
((adev->pdev->device == 0x6900) && (adev->pdev->revision == 0xD1)) ||
335+
((adev->pdev->device == 0x6900) && (adev->pdev->revision == 0xD3))) {
334336
info->is_kicker = true;
335337
strcpy(fw_name, "amdgpu/topaz_k_smc.bin");
336338
} else
@@ -351,16 +353,20 @@ static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device,
351353
if (type == CGS_UCODE_ID_SMU) {
352354
if (((adev->pdev->device == 0x67ef) &&
353355
((adev->pdev->revision == 0xe0) ||
354-
(adev->pdev->revision == 0xe2) ||
355356
(adev->pdev->revision == 0xe5))) ||
356357
((adev->pdev->device == 0x67ff) &&
357358
((adev->pdev->revision == 0xcf) ||
358359
(adev->pdev->revision == 0xef) ||
359360
(adev->pdev->revision == 0xff)))) {
360361
info->is_kicker = true;
361362
strcpy(fw_name, "amdgpu/polaris11_k_smc.bin");
362-
} else
363+
} else if ((adev->pdev->device == 0x67ef) &&
364+
(adev->pdev->revision == 0xe2)) {
365+
info->is_kicker = true;
366+
strcpy(fw_name, "amdgpu/polaris11_k2_smc.bin");
367+
} else {
363368
strcpy(fw_name, "amdgpu/polaris11_smc.bin");
369+
}
364370
} else if (type == CGS_UCODE_ID_SMU_SK) {
365371
strcpy(fw_name, "amdgpu/polaris11_smc_sk.bin");
366372
}
@@ -375,17 +381,35 @@ static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device,
375381
(adev->pdev->revision == 0xe7) ||
376382
(adev->pdev->revision == 0xef))) ||
377383
((adev->pdev->device == 0x6fdf) &&
378-
(adev->pdev->revision == 0xef))) {
384+
((adev->pdev->revision == 0xef) ||
385+
(adev->pdev->revision == 0xff)))) {
379386
info->is_kicker = true;
380387
strcpy(fw_name, "amdgpu/polaris10_k_smc.bin");
381-
} else
388+
} else if ((adev->pdev->device == 0x67df) &&
389+
((adev->pdev->revision == 0xe1) ||
390+
(adev->pdev->revision == 0xf7))) {
391+
info->is_kicker = true;
392+
strcpy(fw_name, "amdgpu/polaris10_k2_smc.bin");
393+
} else {
382394
strcpy(fw_name, "amdgpu/polaris10_smc.bin");
395+
}
383396
} else if (type == CGS_UCODE_ID_SMU_SK) {
384397
strcpy(fw_name, "amdgpu/polaris10_smc_sk.bin");
385398
}
386399
break;
387400
case CHIP_POLARIS12:
388-
strcpy(fw_name, "amdgpu/polaris12_smc.bin");
401+
if (((adev->pdev->device == 0x6987) &&
402+
((adev->pdev->revision == 0xc0) ||
403+
(adev->pdev->revision == 0xc3))) ||
404+
((adev->pdev->device == 0x6981) &&
405+
((adev->pdev->revision == 0x00) ||
406+
(adev->pdev->revision == 0x01) ||
407+
(adev->pdev->revision == 0x10)))) {
408+
info->is_kicker = true;
409+
strcpy(fw_name, "amdgpu/polaris12_k_smc.bin");
410+
} else {
411+
strcpy(fw_name, "amdgpu/polaris12_smc.bin");
412+
}
389413
break;
390414
case CHIP_VEGAM:
391415
strcpy(fw_name, "amdgpu/vegam_smc.bin");

‎drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -124,14 +124,14 @@ static int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, union drm_amdgpu_cs
124124
goto free_chunk;
125125
}
126126

127+
mutex_lock(&p->ctx->lock);
128+
127129
/* skip guilty context job */
128130
if (atomic_read(&p->ctx->guilty) == 1) {
129131
ret = -ECANCELED;
130132
goto free_chunk;
131133
}
132134

133-
mutex_lock(&p->ctx->lock);
134-
135135
/* get chunks */
136136
chunk_array_user = u64_to_user_ptr(cs->in.chunks);
137137
if (copy_from_user(chunk_array, chunk_array_user,

‎drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -872,7 +872,13 @@ static const struct pci_device_id pciidlist[] = {
872872
{0x1002, 0x6864, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
873873
{0x1002, 0x6867, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
874874
{0x1002, 0x6868, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
875+
{0x1002, 0x6869, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
876+
{0x1002, 0x686a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
877+
{0x1002, 0x686b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
875878
{0x1002, 0x686c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
879+
{0x1002, 0x686d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
880+
{0x1002, 0x686e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
881+
{0x1002, 0x686f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
876882
{0x1002, 0x687f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
877883
/* Vega 12 */
878884
{0x1002, 0x69A0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA12},
@@ -885,6 +891,7 @@ static const struct pci_device_id pciidlist[] = {
885891
{0x1002, 0x66A1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA20},
886892
{0x1002, 0x66A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA20},
887893
{0x1002, 0x66A3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA20},
894+
{0x1002, 0x66A4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA20},
888895
{0x1002, 0x66A7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA20},
889896
{0x1002, 0x66AF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA20},
890897
/* Raven */

‎drivers/gpu/drm/amd/amdkfd/kfd_device.c

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -337,12 +337,19 @@ static const struct kfd_deviceid supported_devices[] = {
337337
{ 0x6864, &vega10_device_info }, /* Vega10 */
338338
{ 0x6867, &vega10_device_info }, /* Vega10 */
339339
{ 0x6868, &vega10_device_info }, /* Vega10 */
340+
{ 0x6869, &vega10_device_info }, /* Vega10 */
341+
{ 0x686A, &vega10_device_info }, /* Vega10 */
342+
{ 0x686B, &vega10_device_info }, /* Vega10 */
340343
{ 0x686C, &vega10_vf_device_info }, /* Vega10 vf*/
344+
{ 0x686D, &vega10_device_info }, /* Vega10 */
345+
{ 0x686E, &vega10_device_info }, /* Vega10 */
346+
{ 0x686F, &vega10_device_info }, /* Vega10 */
341347
{ 0x687F, &vega10_device_info }, /* Vega10 */
342348
{ 0x66a0, &vega20_device_info }, /* Vega20 */
343349
{ 0x66a1, &vega20_device_info }, /* Vega20 */
344350
{ 0x66a2, &vega20_device_info }, /* Vega20 */
345351
{ 0x66a3, &vega20_device_info }, /* Vega20 */
352+
{ 0x66a4, &vega20_device_info }, /* Vega20 */
346353
{ 0x66a7, &vega20_device_info }, /* Vega20 */
347354
{ 0x66af, &vega20_device_info } /* Vega20 */
348355
};

‎drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -130,7 +130,7 @@ static void vega20_set_default_registry_data(struct pp_hwmgr *hwmgr)
130130
data->registry_data.disable_auto_wattman = 1;
131131
data->registry_data.auto_wattman_debug = 0;
132132
data->registry_data.auto_wattman_sample_period = 100;
133-
data->registry_data.fclk_gfxclk_ratio = 0x3F6CCCCD;
133+
data->registry_data.fclk_gfxclk_ratio = 0;
134134
data->registry_data.auto_wattman_threshold = 50;
135135
data->registry_data.gfxoff_controlled_by_driver = 1;
136136
data->gfxoff_allowed = false;

‎drivers/gpu/drm/amd/powerplay/inc/smu7_ppsmc.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -386,6 +386,8 @@ typedef uint16_t PPSMC_Result;
386386
#define PPSMC_MSG_AgmResetPsm ((uint16_t) 0x403)
387387
#define PPSMC_MSG_ReadVftCell ((uint16_t) 0x404)
388388

389+
#define PPSMC_MSG_ApplyAvfsCksOffVoltage ((uint16_t) 0x415)
390+
389391
#define PPSMC_MSG_GFX_CU_PG_ENABLE ((uint16_t) 0x280)
390392
#define PPSMC_MSG_GFX_CU_PG_DISABLE ((uint16_t) 0x281)
391393
#define PPSMC_MSG_GetCurrPkgPwr ((uint16_t) 0x282)

‎drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1985,6 +1985,12 @@ int polaris10_thermal_avfs_enable(struct pp_hwmgr *hwmgr)
19851985

19861986
smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableAvfs);
19871987

1988+
/* Apply avfs cks-off voltages to avoid the overshoot
1989+
* when switching to the highest sclk frequency
1990+
*/
1991+
if (data->apply_avfs_cks_off_voltage)
1992+
smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ApplyAvfsCksOffVoltage);
1993+
19881994
return 0;
19891995
}
19901996

‎drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -37,10 +37,13 @@ MODULE_FIRMWARE("amdgpu/fiji_smc.bin");
3737
MODULE_FIRMWARE("amdgpu/polaris10_smc.bin");
3838
MODULE_FIRMWARE("amdgpu/polaris10_smc_sk.bin");
3939
MODULE_FIRMWARE("amdgpu/polaris10_k_smc.bin");
40+
MODULE_FIRMWARE("amdgpu/polaris10_k2_smc.bin");
4041
MODULE_FIRMWARE("amdgpu/polaris11_smc.bin");
4142
MODULE_FIRMWARE("amdgpu/polaris11_smc_sk.bin");
4243
MODULE_FIRMWARE("amdgpu/polaris11_k_smc.bin");
44+
MODULE_FIRMWARE("amdgpu/polaris11_k2_smc.bin");
4345
MODULE_FIRMWARE("amdgpu/polaris12_smc.bin");
46+
MODULE_FIRMWARE("amdgpu/polaris12_k_smc.bin");
4447
MODULE_FIRMWARE("amdgpu/vegam_smc.bin");
4548
MODULE_FIRMWARE("amdgpu/vega10_smc.bin");
4649
MODULE_FIRMWARE("amdgpu/vega10_acg_smc.bin");

‎drivers/gpu/drm/i915/gvt/fb_decoder.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -235,7 +235,7 @@ int intel_vgpu_decode_primary_plane(struct intel_vgpu *vgpu,
235235
plane->bpp = skl_pixel_formats[fmt].bpp;
236236
plane->drm_format = skl_pixel_formats[fmt].drm_format;
237237
} else {
238-
plane->tiled = !!(val & DISPPLANE_TILED);
238+
plane->tiled = val & DISPPLANE_TILED;
239239
fmt = bdw_format_to_drm(val & DISPPLANE_PIXFORMAT_MASK);
240240
plane->bpp = bdw_pixel_formats[fmt].bpp;
241241
plane->drm_format = bdw_pixel_formats[fmt].drm_format;

‎drivers/gpu/drm/i915/i915_drv.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1444,6 +1444,7 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv)
14441444

14451445
intel_uncore_sanitize(dev_priv);
14461446

1447+
intel_gt_init_workarounds(dev_priv);
14471448
i915_gem_load_init_fences(dev_priv);
14481449

14491450
/* On the 945G/GM, the chipset reports the MSI capability on the

‎drivers/gpu/drm/i915/i915_drv.h

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -67,6 +67,7 @@
6767
#include "intel_ringbuffer.h"
6868
#include "intel_uncore.h"
6969
#include "intel_wopcm.h"
70+
#include "intel_workarounds.h"
7071
#include "intel_uc.h"
7172

7273
#include "i915_gem.h"
@@ -1805,6 +1806,7 @@ struct drm_i915_private {
18051806
int dpio_phy_iosf_port[I915_NUM_PHYS_VLV];
18061807

18071808
struct i915_workarounds workarounds;
1809+
struct i915_wa_list gt_wa_list;
18081810

18091811
struct i915_frontbuffer_tracking fb_tracking;
18101812

@@ -2148,6 +2150,8 @@ struct drm_i915_private {
21482150
struct delayed_work idle_work;
21492151

21502152
ktime_t last_init_time;
2153+
2154+
struct i915_vma *scratch;
21512155
} gt;
21522156

21532157
/* perform PHY state sanity checks? */
@@ -3870,4 +3874,9 @@ static inline int intel_hws_csb_write_index(struct drm_i915_private *i915)
38703874
return I915_HWS_CSB_WRITE_INDEX;
38713875
}
38723876

3877+
static inline u32 i915_scratch_offset(const struct drm_i915_private *i915)
3878+
{
3879+
return i915_ggtt_offset(i915->gt.scratch);
3880+
}
3881+
38733882
#endif

‎drivers/gpu/drm/i915/i915_gem.c

Lines changed: 52 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5305,7 +5305,7 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
53055305
}
53065306
}
53075307

5308-
intel_gt_workarounds_apply(dev_priv);
5308+
intel_gt_apply_workarounds(dev_priv);
53095309

53105310
i915_gem_init_swizzling(dev_priv);
53115311

@@ -5500,6 +5500,44 @@ static int __intel_engines_record_defaults(struct drm_i915_private *i915)
55005500
goto out_ctx;
55015501
}
55025502

5503+
static int
5504+
i915_gem_init_scratch(struct drm_i915_private *i915, unsigned int size)
5505+
{
5506+
struct drm_i915_gem_object *obj;
5507+
struct i915_vma *vma;
5508+
int ret;
5509+
5510+
obj = i915_gem_object_create_stolen(i915, size);
5511+
if (!obj)
5512+
obj = i915_gem_object_create_internal(i915, size);
5513+
if (IS_ERR(obj)) {
5514+
DRM_ERROR("Failed to allocate scratch page\n");
5515+
return PTR_ERR(obj);
5516+
}
5517+
5518+
vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
5519+
if (IS_ERR(vma)) {
5520+
ret = PTR_ERR(vma);
5521+
goto err_unref;
5522+
}
5523+
5524+
ret = i915_vma_pin(vma, 0, 0, PIN_GLOBAL | PIN_HIGH);
5525+
if (ret)
5526+
goto err_unref;
5527+
5528+
i915->gt.scratch = vma;
5529+
return 0;
5530+
5531+
err_unref:
5532+
i915_gem_object_put(obj);
5533+
return ret;
5534+
}
5535+
5536+
static void i915_gem_fini_scratch(struct drm_i915_private *i915)
5537+
{
5538+
i915_vma_unpin_and_release(&i915->gt.scratch, 0);
5539+
}
5540+
55035541
int i915_gem_init(struct drm_i915_private *dev_priv)
55045542
{
55055543
int ret;
@@ -5546,12 +5584,19 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
55465584
goto err_unlock;
55475585
}
55485586

5549-
ret = i915_gem_contexts_init(dev_priv);
5587+
ret = i915_gem_init_scratch(dev_priv,
5588+
IS_GEN2(dev_priv) ? SZ_256K : PAGE_SIZE);
55505589
if (ret) {
55515590
GEM_BUG_ON(ret == -EIO);
55525591
goto err_ggtt;
55535592
}
55545593

5594+
ret = i915_gem_contexts_init(dev_priv);
5595+
if (ret) {
5596+
GEM_BUG_ON(ret == -EIO);
5597+
goto err_scratch;
5598+
}
5599+
55555600
ret = intel_engines_init(dev_priv);
55565601
if (ret) {
55575602
GEM_BUG_ON(ret == -EIO);
@@ -5624,6 +5669,8 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
56245669
err_context:
56255670
if (ret != -EIO)
56265671
i915_gem_contexts_fini(dev_priv);
5672+
err_scratch:
5673+
i915_gem_fini_scratch(dev_priv);
56275674
err_ggtt:
56285675
err_unlock:
56295676
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
@@ -5675,8 +5722,11 @@ void i915_gem_fini(struct drm_i915_private *dev_priv)
56755722
intel_uc_fini(dev_priv);
56765723
i915_gem_cleanup_engines(dev_priv);
56775724
i915_gem_contexts_fini(dev_priv);
5725+
i915_gem_fini_scratch(dev_priv);
56785726
mutex_unlock(&dev_priv->drm.struct_mutex);
56795727

5728+
intel_wa_list_free(&dev_priv->gt_wa_list);
5729+
56805730
intel_cleanup_gt_powersave(dev_priv);
56815731

56825732
intel_uc_fini_misc(dev_priv);

‎drivers/gpu/drm/i915/i915_gem_execbuffer.c

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1268,7 +1268,7 @@ relocate_entry(struct i915_vma *vma,
12681268
else if (gen >= 4)
12691269
len = 4;
12701270
else
1271-
len = 6;
1271+
len = 3;
12721272

12731273
batch = reloc_gpu(eb, vma, len);
12741274
if (IS_ERR(batch))
@@ -1309,11 +1309,6 @@ relocate_entry(struct i915_vma *vma,
13091309
*batch++ = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL;
13101310
*batch++ = addr;
13111311
*batch++ = target_offset;
1312-
1313-
/* And again for good measure (blb/pnv) */
1314-
*batch++ = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL;
1315-
*batch++ = addr;
1316-
*batch++ = target_offset;
13171312
}
13181313

13191314
goto out;

‎drivers/gpu/drm/i915/i915_gpu_error.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1495,7 +1495,7 @@ static void gem_record_rings(struct i915_gpu_state *error)
14951495
if (HAS_BROKEN_CS_TLB(i915))
14961496
ee->wa_batchbuffer =
14971497
i915_error_object_create(i915,
1498-
engine->scratch);
1498+
i915->gt.scratch);
14991499
request_record_user_bo(request, ee);
15001500

15011501
ee->ctx =

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