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chleroympe
chleroy
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mpe
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powerpc/6xx: Store PGDIR physical address in a SPRG
Use SPRN_SPRG2 to store the current thread PGDIR and avoid reading thread_struct.pgdir at every TLB miss. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
1 parent 0df977e commit 93c4a16

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4 files changed

+18
-15
lines changed

4 files changed

+18
-15
lines changed

‎arch/powerpc/include/asm/reg.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1167,6 +1167,7 @@
11671167
#ifdef CONFIG_PPC_BOOK3S_32
11681168
#define SPRN_SPRG_SCRATCH0 SPRN_SPRG0
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#define SPRN_SPRG_SCRATCH1 SPRN_SPRG1
1170+
#define SPRN_SPRG_PGDIR SPRN_SPRG2
11701171
#define SPRN_SPRG_603_LRU SPRN_SPRG4
11711172
#endif
11721173

‎arch/powerpc/kernel/cpu_setup_6xx.S

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,10 @@ BEGIN_MMU_FTR_SECTION
2424
li r10,0
2525
mtspr SPRN_SPRG_603_LRU,r10 /* init SW LRU tracking */
2626
END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU)
27+
lis r10, (swapper_pg_dir - PAGE_OFFSET)@h
28+
ori r10, r10, (swapper_pg_dir - PAGE_OFFSET)@l
29+
mtspr SPRN_SPRG_PGDIR, r10
30+
2731
BEGIN_FTR_SECTION
2832
bl __init_fpu_registers
2933
END_FTR_SECTION_IFCLR(CPU_FTR_FPU_UNAVAILABLE)

‎arch/powerpc/kernel/head_32.S

Lines changed: 12 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -500,16 +500,15 @@ InstructionTLBMiss:
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mfspr r3,SPRN_IMISS
501501
lis r1,PAGE_OFFSET@h /* check if kernel address */
502502
cmplw 0,r1,r3
503-
mfspr r2,SPRN_SPRG_THREAD
503+
mfspr r2, SPRN_SPRG_PGDIR
504504
li r1,_PAGE_USER|_PAGE_PRESENT|_PAGE_EXEC /* low addresses tested as user */
505-
lwz r2,PGDIR(r2)
506505
bge- 112f
507506
mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */
508507
rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */
509508
lis r2,swapper_pg_dir@ha /* if kernel address, use */
510509
addi r2,r2,swapper_pg_dir@l /* kernel page table */
511-
112: tophys(r2,r2)
512-
rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
510+
tophys(r2,r2)
511+
112: rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
513512
lwz r2,0(r2) /* get pmd entry */
514513
rlwinm. r2,r2,0,0,19 /* extract address of pte page */
515514
beq- InstructionAddressInvalid /* return if no mapping */
@@ -574,16 +573,15 @@ DataLoadTLBMiss:
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mfspr r3,SPRN_DMISS
575574
lis r1,PAGE_OFFSET@h /* check if kernel address */
576575
cmplw 0,r1,r3
577-
mfspr r2,SPRN_SPRG_THREAD
576+
mfspr r2, SPRN_SPRG_PGDIR
578577
li r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */
579-
lwz r2,PGDIR(r2)
580578
bge- 112f
581579
mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */
582580
rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */
583581
lis r2,swapper_pg_dir@ha /* if kernel address, use */
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addi r2,r2,swapper_pg_dir@l /* kernel page table */
585-
112: tophys(r2,r2)
586-
rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
583+
tophys(r2,r2)
584+
112: rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
587585
lwz r2,0(r2) /* get pmd entry */
588586
rlwinm. r2,r2,0,0,19 /* extract address of pte page */
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beq- DataAddressInvalid /* return if no mapping */
@@ -658,16 +656,15 @@ DataStoreTLBMiss:
658656
mfspr r3,SPRN_DMISS
659657
lis r1,PAGE_OFFSET@h /* check if kernel address */
660658
cmplw 0,r1,r3
661-
mfspr r2,SPRN_SPRG_THREAD
659+
mfspr r2, SPRN_SPRG_PGDIR
662660
li r1,_PAGE_RW|_PAGE_USER|_PAGE_PRESENT /* access flags */
663-
lwz r2,PGDIR(r2)
664661
bge- 112f
665662
mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */
666663
rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */
667664
lis r2,swapper_pg_dir@ha /* if kernel address, use */
668665
addi r2,r2,swapper_pg_dir@l /* kernel page table */
669-
112: tophys(r2,r2)
670-
rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
666+
tophys(r2,r2)
667+
112: rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
671668
lwz r2,0(r2) /* get pmd entry */
672669
rlwinm. r2,r2,0,0,19 /* extract address of pte page */
673670
beq- DataAddressInvalid /* return if no mapping */
@@ -1024,14 +1021,16 @@ _ENTRY(switch_mmu_context)
10241021
li r0,NUM_USER_SEGMENTS
10251022
mtctr r0
10261023

1024+
lwz r4, MM_PGD(r4)
10271025
#ifdef CONFIG_BDI_SWITCH
10281026
/* Context switch the PTE pointer for the Abatron BDI2000.
10291027
* The PGDIR is passed as second argument.
10301028
*/
1031-
lwz r4,MM_PGD(r4)
10321029
lis r5, abatron_pteptrs@ha
10331030
stw r4, abatron_pteptrs@l + 0x4(r5)
10341031
#endif
1032+
tophys(r4, r4)
1033+
mtspr SPRN_SPRG_PGDIR, r4
10351034
li r4,0
10361035
isync
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3:

‎arch/powerpc/mm/hash_low_32.S

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -70,9 +70,8 @@ _GLOBAL(hash_page)
7070
/* Get PTE (linux-style) and check access */
7171
lis r0,KERNELBASE@h /* check if kernel address */
7272
cmplw 0,r4,r0
73-
mfspr r8,SPRN_SPRG_THREAD /* current task's THREAD (phys) */
7473
ori r3,r3,_PAGE_USER|_PAGE_PRESENT /* test low addresses as user */
75-
lwz r5,PGDIR(r8) /* virt page-table root */
74+
mfspr r5, SPRN_SPRG_PGDIR /* virt page-table root */
7675
blt+ 112f /* assume user more likely */
7776
lis r5,swapper_pg_dir@ha /* if kernel address, use */
7877
addi r5,r5,swapper_pg_dir@l /* kernel page table */

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