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arch: Remove spin_unlock_wait() arch-specific definitions
There is no agreed-upon definition of spin_unlock_wait()'s semantics, and it appears that all callers could do just as well with a lock/unlock pair. This commit therefore removes the underlying arch-specific arch_spin_unlock_wait() for all architectures providing them. Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Cc: <linux-arch@vger.kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Alan Stern <stern@rowland.harvard.edu> Cc: Andrea Parri <parri.andrea@gmail.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: Boqun Feng <boqun.feng@gmail.com>
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-241
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+5
-241
lines changed

‎arch/alpha/include/asm/spinlock.h

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -16,11 +16,6 @@
1616
#define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock)
1717
#define arch_spin_is_locked(x) ((x)->lock != 0)
1818

19-
static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
20-
{
21-
smp_cond_load_acquire(&lock->lock, !VAL);
22-
}
23-
2419
static inline int arch_spin_value_unlocked(arch_spinlock_t lock)
2520
{
2621
return lock.lock == 0;

‎arch/arc/include/asm/spinlock.h

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -16,11 +16,6 @@
1616
#define arch_spin_is_locked(x) ((x)->slock != __ARCH_SPIN_LOCK_UNLOCKED__)
1717
#define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock)
1818

19-
static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
20-
{
21-
smp_cond_load_acquire(&lock->slock, !VAL);
22-
}
23-
2419
#ifdef CONFIG_ARC_HAS_LLSC
2520

2621
static inline void arch_spin_lock(arch_spinlock_t *lock)

‎arch/arm/include/asm/spinlock.h

Lines changed: 0 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -52,22 +52,6 @@ static inline void dsb_sev(void)
5252
* memory.
5353
*/
5454

55-
static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
56-
{
57-
u16 owner = READ_ONCE(lock->tickets.owner);
58-
59-
for (;;) {
60-
arch_spinlock_t tmp = READ_ONCE(*lock);
61-
62-
if (tmp.tickets.owner == tmp.tickets.next ||
63-
tmp.tickets.owner != owner)
64-
break;
65-
66-
wfe();
67-
}
68-
smp_acquire__after_ctrl_dep();
69-
}
70-
7155
#define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock)
7256

7357
static inline void arch_spin_lock(arch_spinlock_t *lock)

‎arch/arm64/include/asm/spinlock.h

Lines changed: 5 additions & 53 deletions
Original file line numberDiff line numberDiff line change
@@ -26,58 +26,6 @@
2626
* The memory barriers are implicit with the load-acquire and store-release
2727
* instructions.
2828
*/
29-
static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
30-
{
31-
unsigned int tmp;
32-
arch_spinlock_t lockval;
33-
u32 owner;
34-
35-
/*
36-
* Ensure prior spin_lock operations to other locks have completed
37-
* on this CPU before we test whether "lock" is locked.
38-
*/
39-
smp_mb();
40-
owner = READ_ONCE(lock->owner) << 16;
41-
42-
asm volatile(
43-
" sevl\n"
44-
"1: wfe\n"
45-
"2: ldaxr %w0, %2\n"
46-
/* Is the lock free? */
47-
" eor %w1, %w0, %w0, ror #16\n"
48-
" cbz %w1, 3f\n"
49-
/* Lock taken -- has there been a subsequent unlock->lock transition? */
50-
" eor %w1, %w3, %w0, lsl #16\n"
51-
" cbz %w1, 1b\n"
52-
/*
53-
* The owner has been updated, so there was an unlock->lock
54-
* transition that we missed. That means we can rely on the
55-
* store-release of the unlock operation paired with the
56-
* load-acquire of the lock operation to publish any of our
57-
* previous stores to the new lock owner and therefore don't
58-
* need to bother with the writeback below.
59-
*/
60-
" b 4f\n"
61-
"3:\n"
62-
/*
63-
* Serialise against any concurrent lockers by writing back the
64-
* unlocked lock value
65-
*/
66-
ARM64_LSE_ATOMIC_INSN(
67-
/* LL/SC */
68-
" stxr %w1, %w0, %2\n"
69-
__nops(2),
70-
/* LSE atomics */
71-
" mov %w1, %w0\n"
72-
" cas %w0, %w0, %2\n"
73-
" eor %w1, %w1, %w0\n")
74-
/* Somebody else wrote to the lock, GOTO 10 and reload the value */
75-
" cbnz %w1, 2b\n"
76-
"4:"
77-
: "=&r" (lockval), "=&r" (tmp), "+Q" (*lock)
78-
: "r" (owner)
79-
: "memory");
80-
}
8129

8230
#define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock)
8331

@@ -176,7 +124,11 @@ static inline int arch_spin_value_unlocked(arch_spinlock_t lock)
176124

177125
static inline int arch_spin_is_locked(arch_spinlock_t *lock)
178126
{
179-
smp_mb(); /* See arch_spin_unlock_wait */
127+
/*
128+
* Ensure prior spin_lock operations to other locks have completed
129+
* on this CPU before we test whether "lock" is locked.
130+
*/
131+
smp_mb(); /* ^^^ */
180132
return !arch_spin_value_unlocked(READ_ONCE(*lock));
181133
}
182134

‎arch/blackfin/include/asm/spinlock.h

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -48,11 +48,6 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock)
4848
__raw_spin_unlock_asm(&lock->lock);
4949
}
5050

51-
static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
52-
{
53-
smp_cond_load_acquire(&lock->lock, !VAL);
54-
}
55-
5651
static inline int arch_read_can_lock(arch_rwlock_t *rw)
5752
{
5853
return __raw_uncached_fetch_asm(&rw->lock) > 0;

‎arch/hexagon/include/asm/spinlock.h

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -179,11 +179,6 @@ static inline unsigned int arch_spin_trylock(arch_spinlock_t *lock)
179179
*/
180180
#define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock)
181181

182-
static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
183-
{
184-
smp_cond_load_acquire(&lock->lock, !VAL);
185-
}
186-
187182
#define arch_spin_is_locked(x) ((x)->lock != 0)
188183

189184
#define arch_read_lock_flags(lock, flags) arch_read_lock(lock)

‎arch/ia64/include/asm/spinlock.h

Lines changed: 0 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -76,22 +76,6 @@ static __always_inline void __ticket_spin_unlock(arch_spinlock_t *lock)
7676
ACCESS_ONCE(*p) = (tmp + 2) & ~1;
7777
}
7878

79-
static __always_inline void __ticket_spin_unlock_wait(arch_spinlock_t *lock)
80-
{
81-
int *p = (int *)&lock->lock, ticket;
82-
83-
ia64_invala();
84-
85-
for (;;) {
86-
asm volatile ("ld4.c.nc %0=[%1]" : "=r"(ticket) : "r"(p) : "memory");
87-
if (!(((ticket >> TICKET_SHIFT) ^ ticket) & TICKET_MASK))
88-
return;
89-
cpu_relax();
90-
}
91-
92-
smp_acquire__after_ctrl_dep();
93-
}
94-
9579
static inline int __ticket_spin_is_locked(arch_spinlock_t *lock)
9680
{
9781
long tmp = ACCESS_ONCE(lock->lock);
@@ -143,11 +127,6 @@ static __always_inline void arch_spin_lock_flags(arch_spinlock_t *lock,
143127
arch_spin_lock(lock);
144128
}
145129

146-
static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
147-
{
148-
__ticket_spin_unlock_wait(lock);
149-
}
150-
151130
#define arch_read_can_lock(rw) (*(volatile int *)(rw) >= 0)
152131
#define arch_write_can_lock(rw) (*(volatile int *)(rw) == 0)
153132

‎arch/m32r/include/asm/spinlock.h

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -30,11 +30,6 @@
3030
#define arch_spin_is_locked(x) (*(volatile int *)(&(x)->slock) <= 0)
3131
#define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock)
3232

33-
static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
34-
{
35-
smp_cond_load_acquire(&lock->slock, VAL > 0);
36-
}
37-
3833
/**
3934
* arch_spin_trylock - Try spin lock and return a result
4035
* @lock: Pointer to the lock variable

‎arch/metag/include/asm/spinlock.h

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -15,11 +15,6 @@
1515
* locked.
1616
*/
1717

18-
static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
19-
{
20-
smp_cond_load_acquire(&lock->lock, !VAL);
21-
}
22-
2318
#define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock)
2419

2520
#define arch_read_lock_flags(lock, flags) arch_read_lock(lock)

‎arch/mn10300/include/asm/spinlock.h

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -26,11 +26,6 @@
2626

2727
#define arch_spin_is_locked(x) (*(volatile signed char *)(&(x)->slock) != 0)
2828

29-
static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
30-
{
31-
smp_cond_load_acquire(&lock->slock, !VAL);
32-
}
33-
3429
static inline void arch_spin_unlock(arch_spinlock_t *lock)
3530
{
3631
asm volatile(

‎arch/parisc/include/asm/spinlock.h

Lines changed: 0 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -14,13 +14,6 @@ static inline int arch_spin_is_locked(arch_spinlock_t *x)
1414

1515
#define arch_spin_lock(lock) arch_spin_lock_flags(lock, 0)
1616

17-
static inline void arch_spin_unlock_wait(arch_spinlock_t *x)
18-
{
19-
volatile unsigned int *a = __ldcw_align(x);
20-
21-
smp_cond_load_acquire(a, VAL);
22-
}
23-
2417
static inline void arch_spin_lock_flags(arch_spinlock_t *x,
2518
unsigned long flags)
2619
{

‎arch/powerpc/include/asm/spinlock.h

Lines changed: 0 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -170,39 +170,6 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock)
170170
lock->slock = 0;
171171
}
172172

173-
static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
174-
{
175-
arch_spinlock_t lock_val;
176-
177-
smp_mb();
178-
179-
/*
180-
* Atomically load and store back the lock value (unchanged). This
181-
* ensures that our observation of the lock value is ordered with
182-
* respect to other lock operations.
183-
*/
184-
__asm__ __volatile__(
185-
"1: " PPC_LWARX(%0, 0, %2, 0) "\n"
186-
" stwcx. %0, 0, %2\n"
187-
" bne- 1b\n"
188-
: "=&r" (lock_val), "+m" (*lock)
189-
: "r" (lock)
190-
: "cr0", "xer");
191-
192-
if (arch_spin_value_unlocked(lock_val))
193-
goto out;
194-
195-
while (lock->slock) {
196-
HMT_low();
197-
if (SHARED_PROCESSOR)
198-
__spin_yield(lock);
199-
}
200-
HMT_medium();
201-
202-
out:
203-
smp_mb();
204-
}
205-
206173
/*
207174
* Read-write spinlocks, allowing multiple readers
208175
* but only one writer.

‎arch/s390/include/asm/spinlock.h

Lines changed: 0 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -98,13 +98,6 @@ static inline void arch_spin_unlock(arch_spinlock_t *lp)
9898
: "cc", "memory");
9999
}
100100

101-
static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
102-
{
103-
while (arch_spin_is_locked(lock))
104-
arch_spin_relax(lock);
105-
smp_acquire__after_ctrl_dep();
106-
}
107-
108101
/*
109102
* Read-write spinlocks, allowing multiple readers
110103
* but only one writer.

‎arch/sh/include/asm/spinlock-cas.h

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -29,11 +29,6 @@ static inline unsigned __sl_cas(volatile unsigned *p, unsigned old, unsigned new
2929
#define arch_spin_is_locked(x) ((x)->lock <= 0)
3030
#define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock)
3131

32-
static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
33-
{
34-
smp_cond_load_acquire(&lock->lock, VAL > 0);
35-
}
36-
3732
static inline void arch_spin_lock(arch_spinlock_t *lock)
3833
{
3934
while (!__sl_cas(&lock->lock, 1, 0));

‎arch/sh/include/asm/spinlock-llsc.h

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -21,11 +21,6 @@
2121
#define arch_spin_is_locked(x) ((x)->lock <= 0)
2222
#define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock)
2323

24-
static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
25-
{
26-
smp_cond_load_acquire(&lock->lock, VAL > 0);
27-
}
28-
2924
/*
3025
* Simple spin lock operations. There are two variants, one clears IRQ's
3126
* on the local processor, one does not.

‎arch/sparc/include/asm/spinlock_32.h

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -14,11 +14,6 @@
1414

1515
#define arch_spin_is_locked(lock) (*((volatile unsigned char *)(lock)) != 0)
1616

17-
static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
18-
{
19-
smp_cond_load_acquire(&lock->lock, !VAL);
20-
}
21-
2217
static inline void arch_spin_lock(arch_spinlock_t *lock)
2318
{
2419
__asm__ __volatile__(

‎arch/tile/include/asm/spinlock_32.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -64,8 +64,6 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock)
6464
lock->current_ticket = old_ticket + TICKET_QUANTUM;
6565
}
6666

67-
void arch_spin_unlock_wait(arch_spinlock_t *lock);
68-
6967
/*
7068
* Read-write spinlocks, allowing multiple readers
7169
* but only one writer.

‎arch/tile/include/asm/spinlock_64.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -58,8 +58,6 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock)
5858
__insn_fetchadd4(&lock->lock, 1U << __ARCH_SPIN_CURRENT_SHIFT);
5959
}
6060

61-
void arch_spin_unlock_wait(arch_spinlock_t *lock);
62-
6361
void arch_spin_lock_slow(arch_spinlock_t *lock, u32 val);
6462

6563
/* Grab the "next" ticket number and bump it atomically.

‎arch/tile/lib/spinlock_32.c

Lines changed: 0 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -62,29 +62,6 @@ int arch_spin_trylock(arch_spinlock_t *lock)
6262
}
6363
EXPORT_SYMBOL(arch_spin_trylock);
6464

65-
void arch_spin_unlock_wait(arch_spinlock_t *lock)
66-
{
67-
u32 iterations = 0;
68-
int curr = READ_ONCE(lock->current_ticket);
69-
int next = READ_ONCE(lock->next_ticket);
70-
71-
/* Return immediately if unlocked. */
72-
if (next == curr)
73-
return;
74-
75-
/* Wait until the current locker has released the lock. */
76-
do {
77-
delay_backoff(iterations++);
78-
} while (READ_ONCE(lock->current_ticket) == curr);
79-
80-
/*
81-
* The TILE architecture doesn't do read speculation; therefore
82-
* a control dependency guarantees a LOAD->{LOAD,STORE} order.
83-
*/
84-
barrier();
85-
}
86-
EXPORT_SYMBOL(arch_spin_unlock_wait);
87-
8865
/*
8966
* The low byte is always reserved to be the marker for a "tns" operation
9067
* since the low bit is set to "1" by a tns. The next seven bits are

‎arch/tile/lib/spinlock_64.c

Lines changed: 0 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -62,28 +62,6 @@ int arch_spin_trylock(arch_spinlock_t *lock)
6262
}
6363
EXPORT_SYMBOL(arch_spin_trylock);
6464

65-
void arch_spin_unlock_wait(arch_spinlock_t *lock)
66-
{
67-
u32 iterations = 0;
68-
u32 val = READ_ONCE(lock->lock);
69-
u32 curr = arch_spin_current(val);
70-
71-
/* Return immediately if unlocked. */
72-
if (arch_spin_next(val) == curr)
73-
return;
74-
75-
/* Wait until the current locker has released the lock. */
76-
do {
77-
delay_backoff(iterations++);
78-
} while (arch_spin_current(READ_ONCE(lock->lock)) == curr);
79-
80-
/*
81-
* The TILE architecture doesn't do read speculation; therefore
82-
* a control dependency guarantees a LOAD->{LOAD,STORE} order.
83-
*/
84-
barrier();
85-
}
86-
EXPORT_SYMBOL(arch_spin_unlock_wait);
8765

8866
/*
8967
* If the read lock fails due to a writer, we retry periodically

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