@@ -62,33 +62,20 @@ struct irqc_priv {
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struct irqc_irq irq [IRQC_IRQ_MAX ];
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unsigned int number_of_irqs ;
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struct platform_device * pdev ;
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- struct irq_chip irq_chip ;
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+ struct irq_chip_generic * gc ;
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struct irq_domain * irq_domain ;
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struct clk * clk ;
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};
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- static void irqc_dbg (struct irqc_irq * i , char * str )
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- {
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- dev_dbg (& i -> p -> pdev -> dev , "%s (%d:%d)\n" ,
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- str , i -> requested_irq , i -> hw_irq );
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- }
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-
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- static void irqc_irq_enable (struct irq_data * d )
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+ static struct irqc_priv * irq_data_to_priv (struct irq_data * data )
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{
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- struct irqc_priv * p = irq_data_get_irq_chip_data (d );
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- int hw_irq = irqd_to_hwirq (d );
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-
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- irqc_dbg (& p -> irq [hw_irq ], "enable" );
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- iowrite32 (BIT (hw_irq ), p -> cpu_int_base + IRQC_EN_SET );
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+ return data -> domain -> host_data ;
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}
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- static void irqc_irq_disable (struct irq_data * d )
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+ static void irqc_dbg (struct irqc_irq * i , char * str )
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{
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- struct irqc_priv * p = irq_data_get_irq_chip_data (d );
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- int hw_irq = irqd_to_hwirq (d );
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-
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- irqc_dbg (& p -> irq [hw_irq ], "disable" );
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- iowrite32 (BIT (hw_irq ), p -> cpu_int_base + IRQC_EN_STS );
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+ dev_dbg (& i -> p -> pdev -> dev , "%s (%d:%d)\n" ,
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+ str , i -> requested_irq , i -> hw_irq );
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}
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static unsigned char irqc_sense [IRQ_TYPE_SENSE_MASK + 1 ] = {
@@ -101,7 +88,7 @@ static unsigned char irqc_sense[IRQ_TYPE_SENSE_MASK + 1] = {
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static int irqc_irq_set_type (struct irq_data * d , unsigned int type )
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{
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- struct irqc_priv * p = irq_data_get_irq_chip_data (d );
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+ struct irqc_priv * p = irq_data_to_priv (d );
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int hw_irq = irqd_to_hwirq (d );
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unsigned char value = irqc_sense [type & IRQ_TYPE_SENSE_MASK ];
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u32 tmp ;
@@ -120,7 +107,7 @@ static int irqc_irq_set_type(struct irq_data *d, unsigned int type)
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static int irqc_irq_set_wake (struct irq_data * d , unsigned int on )
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{
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- struct irqc_priv * p = irq_data_get_irq_chip_data (d );
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+ struct irqc_priv * p = irq_data_to_priv (d );
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int hw_irq = irqd_to_hwirq (d );
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irq_set_irq_wake (p -> irq [hw_irq ].requested_irq , on );
@@ -153,35 +140,11 @@ static irqreturn_t irqc_irq_handler(int irq, void *dev_id)
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return IRQ_NONE ;
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}
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- /*
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- * This lock class tells lockdep that IRQC irqs are in a different
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- * category than their parents, so it won't report false recursion.
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- */
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- static struct lock_class_key irqc_irq_lock_class ;
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-
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- static int irqc_irq_domain_map (struct irq_domain * h , unsigned int virq ,
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- irq_hw_number_t hw )
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- {
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- struct irqc_priv * p = h -> host_data ;
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-
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- irqc_dbg (& p -> irq [hw ], "map" );
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- irq_set_chip_data (virq , h -> host_data );
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- irq_set_lockdep_class (virq , & irqc_irq_lock_class );
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- irq_set_chip_and_handler (virq , & p -> irq_chip , handle_level_irq );
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- return 0 ;
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- }
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-
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- static const struct irq_domain_ops irqc_irq_domain_ops = {
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- .map = irqc_irq_domain_map ,
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- .xlate = irq_domain_xlate_twocell ,
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- };
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-
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static int irqc_probe (struct platform_device * pdev )
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{
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struct irqc_priv * p ;
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struct resource * io ;
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struct resource * irq ;
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- struct irq_chip * irq_chip ;
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const char * name = dev_name (& pdev -> dev );
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int ret ;
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int k ;
@@ -241,40 +204,51 @@ static int irqc_probe(struct platform_device *pdev)
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p -> cpu_int_base = p -> iomem + IRQC_INT_CPU_BASE (0 ); /* SYS-SPI */
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- irq_chip = & p -> irq_chip ;
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- irq_chip -> name = name ;
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- irq_chip -> irq_mask = irqc_irq_disable ;
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- irq_chip -> irq_unmask = irqc_irq_enable ;
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- irq_chip -> irq_set_type = irqc_irq_set_type ;
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- irq_chip -> irq_set_wake = irqc_irq_set_wake ;
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- irq_chip -> flags = IRQCHIP_MASK_ON_SUSPEND ;
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-
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p -> irq_domain = irq_domain_add_linear (pdev -> dev .of_node ,
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p -> number_of_irqs ,
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- & irqc_irq_domain_ops , p );
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+ & irq_generic_chip_ops , p );
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if (!p -> irq_domain ) {
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ret = - ENXIO ;
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dev_err (& pdev -> dev , "cannot initialize irq domain\n" );
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goto err2 ;
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}
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+ ret = irq_alloc_domain_generic_chips (p -> irq_domain , p -> number_of_irqs ,
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+ 1 , name , handle_level_irq ,
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+ 0 , 0 , IRQ_GC_INIT_NESTED_LOCK );
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+ if (ret ) {
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+ dev_err (& pdev -> dev , "cannot allocate generic chip\n" );
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+ goto err3 ;
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+ }
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+
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+ p -> gc = irq_get_domain_generic_chip (p -> irq_domain , 0 );
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+ p -> gc -> reg_base = p -> cpu_int_base ;
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+ p -> gc -> chip_types [0 ].regs .enable = IRQC_EN_SET ;
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+ p -> gc -> chip_types [0 ].regs .disable = IRQC_EN_STS ;
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+ p -> gc -> chip_types [0 ].chip .irq_mask = irq_gc_mask_disable_reg ;
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+ p -> gc -> chip_types [0 ].chip .irq_unmask = irq_gc_unmask_enable_reg ;
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+ p -> gc -> chip_types [0 ].chip .irq_set_type = irqc_irq_set_type ;
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+ p -> gc -> chip_types [0 ].chip .irq_set_wake = irqc_irq_set_wake ;
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+ p -> gc -> chip_types [0 ].chip .flags = IRQCHIP_MASK_ON_SUSPEND ;
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+
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/* request interrupts one by one */
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for (k = 0 ; k < p -> number_of_irqs ; k ++ ) {
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if (request_irq (p -> irq [k ].requested_irq , irqc_irq_handler ,
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0 , name , & p -> irq [k ])) {
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dev_err (& pdev -> dev , "failed to request IRQ\n" );
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ret = - ENOENT ;
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- goto err3 ;
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+ goto err4 ;
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}
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}
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dev_info (& pdev -> dev , "driving %d irqs\n" , p -> number_of_irqs );
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return 0 ;
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- err3 :
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+ err4 :
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while (-- k >= 0 )
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free_irq (p -> irq [k ].requested_irq , & p -> irq [k ]);
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+ err3 :
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irq_domain_remove (p -> irq_domain );
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err2 :
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iounmap (p -> iomem );
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