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yingjoeJason Cooper
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irqchip: gic: Support hierarchy irq domain.
Add support to use gic as a parent for stacked irq domain. Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1416902662-19281-2-git-send-email-yingjoe.chen@mediatek.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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drivers/irqchip/Kconfig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,7 @@ config IRQCHIP
55
config ARM_GIC
66
bool
77
select IRQ_DOMAIN
8+
select IRQ_DOMAIN_HIERARCHY
89
select MULTI_IRQ_HANDLER
910

1011
config GIC_NON_BANKED

drivers/irqchip/irq-gic.c

Lines changed: 53 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -788,17 +788,16 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,
788788
{
789789
if (hw < 32) {
790790
irq_set_percpu_devid(irq);
791-
irq_set_chip_and_handler(irq, &gic_chip,
792-
handle_percpu_devid_irq);
791+
irq_domain_set_info(d, irq, hw, &gic_chip, d->host_data,
792+
handle_percpu_devid_irq, NULL, NULL);
793793
set_irq_flags(irq, IRQF_VALID | IRQF_NOAUTOEN);
794794
} else {
795-
irq_set_chip_and_handler(irq, &gic_chip,
796-
handle_fasteoi_irq);
795+
irq_domain_set_info(d, irq, hw, &gic_chip, d->host_data,
796+
handle_fasteoi_irq, NULL, NULL);
797797
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
798798

799799
gic_routable_irq_domain_ops->map(d, irq, hw);
800800
}
801-
irq_set_chip_data(irq, d->host_data);
802801
return 0;
803802
}
804803

@@ -858,6 +857,31 @@ static struct notifier_block gic_cpu_notifier = {
858857
};
859858
#endif
860859

860+
static int gic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
861+
unsigned int nr_irqs, void *arg)
862+
{
863+
int i, ret;
864+
irq_hw_number_t hwirq;
865+
unsigned int type = IRQ_TYPE_NONE;
866+
struct of_phandle_args *irq_data = arg;
867+
868+
ret = gic_irq_domain_xlate(domain, irq_data->np, irq_data->args,
869+
irq_data->args_count, &hwirq, &type);
870+
if (ret)
871+
return ret;
872+
873+
for (i = 0; i < nr_irqs; i++)
874+
gic_irq_domain_map(domain, virq + i, hwirq + i);
875+
876+
return 0;
877+
}
878+
879+
static const struct irq_domain_ops gic_irq_domain_hierarchy_ops = {
880+
.xlate = gic_irq_domain_xlate,
881+
.alloc = gic_irq_domain_alloc,
882+
.free = irq_domain_free_irqs_top,
883+
};
884+
861885
static const struct irq_domain_ops gic_irq_domain_ops = {
862886
.map = gic_irq_domain_map,
863887
.unmap = gic_irq_domain_unmap,
@@ -947,18 +971,6 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
947971
for (i = 0; i < NR_GIC_CPU_IF; i++)
948972
gic_cpu_map[i] = 0xff;
949973

950-
/*
951-
* For primary GICs, skip over SGIs.
952-
* For secondary GICs, skip over PPIs, too.
953-
*/
954-
if (gic_nr == 0 && (irq_start & 31) > 0) {
955-
hwirq_base = 16;
956-
if (irq_start != -1)
957-
irq_start = (irq_start & ~31) + 16;
958-
} else {
959-
hwirq_base = 32;
960-
}
961-
962974
/*
963975
* Find out how many interrupts are supported.
964976
* The GIC only supports up to 1020 interrupt sources.
@@ -969,10 +981,31 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
969981
gic_irqs = 1020;
970982
gic->gic_irqs = gic_irqs;
971983

972-
gic_irqs -= hwirq_base; /* calculate # of irqs to allocate */
984+
if (node) { /* DT case */
985+
const struct irq_domain_ops *ops = &gic_irq_domain_hierarchy_ops;
986+
987+
if (!of_property_read_u32(node, "arm,routable-irqs",
988+
&nr_routable_irqs)) {
989+
ops = &gic_irq_domain_ops;
990+
gic_irqs = nr_routable_irqs;
991+
}
992+
993+
gic->domain = irq_domain_add_linear(node, gic_irqs, ops, gic);
994+
} else { /* Non-DT case */
995+
/*
996+
* For primary GICs, skip over SGIs.
997+
* For secondary GICs, skip over PPIs, too.
998+
*/
999+
if (gic_nr == 0 && (irq_start & 31) > 0) {
1000+
hwirq_base = 16;
1001+
if (irq_start != -1)
1002+
irq_start = (irq_start & ~31) + 16;
1003+
} else {
1004+
hwirq_base = 32;
1005+
}
1006+
1007+
gic_irqs -= hwirq_base; /* calculate # of irqs to allocate */
9731008

974-
if (of_property_read_u32(node, "arm,routable-irqs",
975-
&nr_routable_irqs)) {
9761009
irq_base = irq_alloc_descs(irq_start, 16, gic_irqs,
9771010
numa_node_id());
9781011
if (IS_ERR_VALUE(irq_base)) {
@@ -983,10 +1016,6 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
9831016

9841017
gic->domain = irq_domain_add_legacy(node, gic_irqs, irq_base,
9851018
hwirq_base, &gic_irq_domain_ops, gic);
986-
} else {
987-
gic->domain = irq_domain_add_linear(node, nr_routable_irqs,
988-
&gic_irq_domain_ops,
989-
gic);
9901019
}
9911020

9921021
if (WARN_ON(!gic->domain))

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