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Yunsheng Lindavem330
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net: hns3: refactor the coalesce related struct
This patch refoctors the coalesce related struct by introducing the hns3_enet_coalesce struct, in order to fix the coalesce configuation lost problem when changing the channel number. Signed-off-by: Yunsheng Lin <linyunsheng@huawei.com> Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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-36
lines changed

3 files changed

+46
-36
lines changed

drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

Lines changed: 23 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -168,8 +168,8 @@ void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector,
168168
* GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
169169
*/
170170

171-
if (rl_reg > 0 && !tqp_vector->tx_group.gl_adapt_enable &&
172-
!tqp_vector->rx_group.gl_adapt_enable)
171+
if (rl_reg > 0 && !tqp_vector->tx_group.coal.gl_adapt_enable &&
172+
!tqp_vector->rx_group.coal.gl_adapt_enable)
173173
/* According to the hardware, the range of rl_reg is
174174
* 0-59 and the unit is 4.
175175
*/
@@ -205,17 +205,17 @@ static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector,
205205
*/
206206

207207
/* Default: enable interrupt coalescing self-adaptive and GL */
208-
tqp_vector->tx_group.gl_adapt_enable = 1;
209-
tqp_vector->rx_group.gl_adapt_enable = 1;
208+
tqp_vector->tx_group.coal.gl_adapt_enable = 1;
209+
tqp_vector->rx_group.coal.gl_adapt_enable = 1;
210210

211-
tqp_vector->tx_group.int_gl = HNS3_INT_GL_50K;
212-
tqp_vector->rx_group.int_gl = HNS3_INT_GL_50K;
211+
tqp_vector->tx_group.coal.int_gl = HNS3_INT_GL_50K;
212+
tqp_vector->rx_group.coal.int_gl = HNS3_INT_GL_50K;
213213

214214
/* Default: disable RL */
215215
h->kinfo.int_rl_setting = 0;
216216

217-
tqp_vector->rx_group.flow_level = HNS3_FLOW_LOW;
218-
tqp_vector->tx_group.flow_level = HNS3_FLOW_LOW;
217+
tqp_vector->rx_group.coal.flow_level = HNS3_FLOW_LOW;
218+
tqp_vector->tx_group.coal.flow_level = HNS3_FLOW_LOW;
219219
}
220220

221221
static void hns3_vector_gl_rl_init_hw(struct hns3_enet_tqp_vector *tqp_vector,
@@ -224,9 +224,9 @@ static void hns3_vector_gl_rl_init_hw(struct hns3_enet_tqp_vector *tqp_vector,
224224
struct hnae3_handle *h = priv->ae_handle;
225225

226226
hns3_set_vector_coalesce_tx_gl(tqp_vector,
227-
tqp_vector->tx_group.int_gl);
227+
tqp_vector->tx_group.coal.int_gl);
228228
hns3_set_vector_coalesce_rx_gl(tqp_vector,
229-
tqp_vector->rx_group.int_gl);
229+
tqp_vector->rx_group.coal.int_gl);
230230
hns3_set_vector_coalesce_rl(tqp_vector, h->kinfo.int_rl_setting);
231231
}
232232

@@ -2393,12 +2393,12 @@ static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
23932393
u16 new_int_gl;
23942394
int usecs;
23952395

2396-
if (!ring_group->int_gl)
2396+
if (!ring_group->coal.int_gl)
23972397
return false;
23982398

23992399
if (ring_group->total_packets == 0) {
2400-
ring_group->int_gl = HNS3_INT_GL_50K;
2401-
ring_group->flow_level = HNS3_FLOW_LOW;
2400+
ring_group->coal.int_gl = HNS3_INT_GL_50K;
2401+
ring_group->coal.flow_level = HNS3_FLOW_LOW;
24022402
return true;
24032403
}
24042404

@@ -2408,10 +2408,10 @@ static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
24082408
* 20-1249MB/s high (18000 ints/s)
24092409
* > 40000pps ultra (8000 ints/s)
24102410
*/
2411-
new_flow_level = ring_group->flow_level;
2412-
new_int_gl = ring_group->int_gl;
2411+
new_flow_level = ring_group->coal.flow_level;
2412+
new_int_gl = ring_group->coal.int_gl;
24132413
tqp_vector = ring_group->ring->tqp_vector;
2414-
usecs = (ring_group->int_gl << 1);
2414+
usecs = (ring_group->coal.int_gl << 1);
24152415
bytes_per_usecs = ring_group->total_bytes / usecs;
24162416
/* 1000000 microseconds */
24172417
packets_per_secs = ring_group->total_packets * 1000000 / usecs;
@@ -2458,9 +2458,9 @@ static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
24582458

24592459
ring_group->total_bytes = 0;
24602460
ring_group->total_packets = 0;
2461-
ring_group->flow_level = new_flow_level;
2462-
if (new_int_gl != ring_group->int_gl) {
2463-
ring_group->int_gl = new_int_gl;
2461+
ring_group->coal.flow_level = new_flow_level;
2462+
if (new_int_gl != ring_group->coal.int_gl) {
2463+
ring_group->coal.int_gl = new_int_gl;
24642464
return true;
24652465
}
24662466
return false;
@@ -2472,18 +2472,18 @@ static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
24722472
struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;
24732473
bool rx_update, tx_update;
24742474

2475-
if (rx_group->gl_adapt_enable) {
2475+
if (rx_group->coal.gl_adapt_enable) {
24762476
rx_update = hns3_get_new_int_gl(rx_group);
24772477
if (rx_update)
24782478
hns3_set_vector_coalesce_rx_gl(tqp_vector,
2479-
rx_group->int_gl);
2479+
rx_group->coal.int_gl);
24802480
}
24812481

2482-
if (tx_group->gl_adapt_enable) {
2482+
if (tx_group->coal.gl_adapt_enable) {
24832483
tx_update = hns3_get_new_int_gl(&tqp_vector->tx_group);
24842484
if (tx_update)
24852485
hns3_set_vector_coalesce_tx_gl(tqp_vector,
2486-
tx_group->int_gl);
2486+
tx_group->coal.int_gl);
24872487
}
24882488
}
24892489

drivers/net/ethernet/hisilicon/hns3/hns3_enet.h

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -460,15 +460,19 @@ enum hns3_link_mode_bits {
460460
#define HNS3_INT_RL_MAX 0x00EC
461461
#define HNS3_INT_RL_ENABLE_MASK 0x40
462462

463+
struct hns3_enet_coalesce {
464+
u16 int_gl;
465+
u8 gl_adapt_enable;
466+
enum hns3_flow_level_range flow_level;
467+
};
468+
463469
struct hns3_enet_ring_group {
464470
/* array of pointers to rings */
465471
struct hns3_enet_ring *ring;
466472
u64 total_bytes; /* total bytes processed this group */
467473
u64 total_packets; /* total packets processed this group */
468474
u16 count;
469-
enum hns3_flow_level_range flow_level;
470-
u16 int_gl;
471-
u8 gl_adapt_enable;
475+
struct hns3_enet_coalesce coal;
472476
};
473477

474478
struct hns3_enet_tqp_vector {

drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c

Lines changed: 16 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -905,11 +905,13 @@ static int hns3_get_coalesce_per_queue(struct net_device *netdev, u32 queue,
905905
tx_vector = priv->ring_data[queue].ring->tqp_vector;
906906
rx_vector = priv->ring_data[queue_num + queue].ring->tqp_vector;
907907

908-
cmd->use_adaptive_tx_coalesce = tx_vector->tx_group.gl_adapt_enable;
909-
cmd->use_adaptive_rx_coalesce = rx_vector->rx_group.gl_adapt_enable;
908+
cmd->use_adaptive_tx_coalesce =
909+
tx_vector->tx_group.coal.gl_adapt_enable;
910+
cmd->use_adaptive_rx_coalesce =
911+
rx_vector->rx_group.coal.gl_adapt_enable;
910912

911-
cmd->tx_coalesce_usecs = tx_vector->tx_group.int_gl;
912-
cmd->rx_coalesce_usecs = rx_vector->rx_group.int_gl;
913+
cmd->tx_coalesce_usecs = tx_vector->tx_group.coal.int_gl;
914+
cmd->rx_coalesce_usecs = rx_vector->rx_group.coal.int_gl;
913915

914916
cmd->tx_coalesce_usecs_high = h->kinfo.int_rl_setting;
915917
cmd->rx_coalesce_usecs_high = h->kinfo.int_rl_setting;
@@ -1029,14 +1031,18 @@ static void hns3_set_coalesce_per_queue(struct net_device *netdev,
10291031
tx_vector = priv->ring_data[queue].ring->tqp_vector;
10301032
rx_vector = priv->ring_data[queue_num + queue].ring->tqp_vector;
10311033

1032-
tx_vector->tx_group.gl_adapt_enable = cmd->use_adaptive_tx_coalesce;
1033-
rx_vector->rx_group.gl_adapt_enable = cmd->use_adaptive_rx_coalesce;
1034+
tx_vector->tx_group.coal.gl_adapt_enable =
1035+
cmd->use_adaptive_tx_coalesce;
1036+
rx_vector->rx_group.coal.gl_adapt_enable =
1037+
cmd->use_adaptive_rx_coalesce;
10341038

1035-
tx_vector->tx_group.int_gl = cmd->tx_coalesce_usecs;
1036-
rx_vector->rx_group.int_gl = cmd->rx_coalesce_usecs;
1039+
tx_vector->tx_group.coal.int_gl = cmd->tx_coalesce_usecs;
1040+
rx_vector->rx_group.coal.int_gl = cmd->rx_coalesce_usecs;
10371041

1038-
hns3_set_vector_coalesce_tx_gl(tx_vector, tx_vector->tx_group.int_gl);
1039-
hns3_set_vector_coalesce_rx_gl(rx_vector, rx_vector->rx_group.int_gl);
1042+
hns3_set_vector_coalesce_tx_gl(tx_vector,
1043+
tx_vector->tx_group.coal.int_gl);
1044+
hns3_set_vector_coalesce_rx_gl(rx_vector,
1045+
rx_vector->rx_group.coal.int_gl);
10401046

10411047
hns3_set_vector_coalesce_rl(tx_vector, h->kinfo.int_rl_setting);
10421048
hns3_set_vector_coalesce_rl(rx_vector, h->kinfo.int_rl_setting);

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