x86/boot: Spell out "boot CPU" for BP

jdelvare · Ingo Molnar · commit a1652bb8a01c · 2017-10-03T18:41:23.000+02:00
It's not obvious to everybody that BP stands for boot processor. At
least it was not for me. And BP is also a CPU register on x86, so it
is ambiguous. Spell out "boot CPU" everywhere instead.

Signed-off-by: Jean Delvare &lt;jdelvare@suse.de&gt;
Cc: Alok Kataria &lt;akataria@vmware.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
diff --git a/arch/x86/include/asm/mpspec_def.h b/arch/x86/include/asm/mpspec_def.h
@@ -58,7 +58,7 @@ struct mpc_table {
 #define	MP_TRANSLATION		192
 
 #define CPU_ENABLED		1	/* Processor is available */
-#define CPU_BOOTPROCESSOR	2	/* Processor is the BP */
+#define CPU_BOOTPROCESSOR	2	/* Processor is the boot CPU */
 
 #define CPU_STEPPING_MASK	0x000F
 #define CPU_MODEL_MASK		0x00F0
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
@@ -1462,7 +1462,7 @@ void setup_local_APIC(void)
 	/*
 	 * Set up LVT0, LVT1:
 	 *
-	 * set up through-local-APIC on the BP's LINT0. This is not
+	 * set up through-local-APIC on the boot CPU's LINT0. This is not
 	 * strictly necessary in pure symmetric-IO mode, but sometimes
 	 * we delegate interrupts to the 8259A.
 	 */
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
@@ -863,8 +863,8 @@ static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c)
  * cache alignment.
  * The others are not touched to avoid unwanted side effects.
  *
- * WARNING: this function is only called on the BP.  Don't add code here
- * that is supposed to run on all CPUs.
+ * WARNING: this function is only called on the boot CPU.  Don't add code
+ * here that is supposed to run on all CPUs.
  */
 static void __init early_identify_cpu(struct cpuinfo_x86 *c)
 {
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
@@ -1045,7 +1045,7 @@ void __init setup_arch(char **cmdline_p)
 
 	/*
 	 * VMware detection requires dmi to be available, so this
-	 * needs to be done after dmi_scan_machine, for the BP.
+	 * needs to be done after dmi_scan_machine(), for the boot CPU.
 	 */
 	init_hypervisor_platform();
 
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
@@ -249,7 +249,7 @@ static void notrace start_secondary(void *unused)
 	/* otherwise gcc will move up smp_processor_id before the cpu_init */
 	barrier();
 	/*
-	 * Check TSC synchronization with the BP:
+	 * Check TSC synchronization with the boot CPU:
 	 */
 	check_tsc_sync_target();
 

Original file line number	Diff line number	Diff line change
`@@ -1462,7 +1462,7 @@ void setup_local_APIC(void)`
`1462`	`1462`	`/*`
`1463`	`1463`	`* Set up LVT0, LVT1:`
`1464`	`1464`	`*`
`1465`		`- * set up through-local-APIC on the BP's LINT0. This is not`
	`1465`	`+ * set up through-local-APIC on the boot CPU's LINT0. This is not`
`1466`	`1466`	`* strictly necessary in pure symmetric-IO mode, but sometimes`
`1467`	`1467`	`* we delegate interrupts to the 8259A.`
`1468`	`1468`	`*/`
Original file line number	Diff line number	Diff line change
`@@ -863,8 +863,8 @@ static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c)`
`863`	`863`	`* cache alignment.`
`864`	`864`	`* The others are not touched to avoid unwanted side effects.`
`865`	`865`	`*`
`866`		`- * WARNING: this function is only called on the BP. Don't add code here`
`867`		`- * that is supposed to run on all CPUs.`
	`866`	`+ * WARNING: this function is only called on the boot CPU. Don't add code`
	`867`	`+ * here that is supposed to run on all CPUs.`
`868`	`868`	`*/`
`869`	`869`	`static void __init early_identify_cpu(struct cpuinfo_x86 *c)`
`870`	`870`	`{`