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Harsh Jainherbertx
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crypto: chelsio - Update ntx queue received from cxgb4
Update cxgb4 to send No. of Tx Queue created in lldinfo struct and use the same ntxq in chcr driver. This patch depends on following commit commit add92a8 "Fix memory corruption in DMA Mapped buffers" v2: Free txq_info in error case as pointed by Lino Sanfilippo. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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3 files changed

+18
-7
lines changed

3 files changed

+18
-7
lines changed

drivers/crypto/chelsio/chcr_algo.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1338,8 +1338,7 @@ static int chcr_device_init(struct chcr_context *ctx)
13381338
}
13391339
ctx->dev = u_ctx->dev;
13401340
adap = padap(ctx->dev);
1341-
ntxq = min_not_zero((unsigned int)u_ctx->lldi.nrxq,
1342-
adap->vres.ncrypto_fc);
1341+
ntxq = u_ctx->lldi.ntxq;
13431342
rxq_perchan = u_ctx->lldi.nrxq / u_ctx->lldi.nchan;
13441343
txq_perchan = ntxq / u_ctx->lldi.nchan;
13451344
spin_lock(&ctx->dev->lock_chcr_dev);

drivers/crypto/chelsio/chcr_core.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@ static chcr_handler_func work_handlers[NUM_CPL_CMDS] = {
4343
static struct cxgb4_uld_info chcr_uld_info = {
4444
.name = DRV_MODULE_NAME,
4545
.nrxq = MAX_ULD_QSETS,
46-
.ntxq = MAX_ULD_QSETS,
46+
/* Max ntxq will be derived from fw config file*/
4747
.rxq_size = 1024,
4848
.add = chcr_uld_add,
4949
.state_change = chcr_uld_state_change,

drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.c

Lines changed: 16 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -520,10 +520,20 @@ setup_sge_txq_uld(struct adapter *adap, unsigned int uld_type,
520520
txq_info = kzalloc(sizeof(*txq_info), GFP_KERNEL);
521521
if (!txq_info)
522522
return -ENOMEM;
523+
if (uld_type == CXGB4_ULD_CRYPTO) {
524+
i = min_t(int, adap->vres.ncrypto_fc,
525+
num_online_cpus());
526+
txq_info->ntxq = rounddown(i, adap->params.nports);
527+
if (txq_info->ntxq <= 0) {
528+
dev_warn(adap->pdev_dev, "Crypto Tx Queues can't be zero\n");
529+
kfree(txq_info);
530+
return -EINVAL;
531+
}
523532

524-
i = min_t(int, uld_info->ntxq, num_online_cpus());
525-
txq_info->ntxq = roundup(i, adap->params.nports);
526-
533+
} else {
534+
i = min_t(int, uld_info->ntxq, num_online_cpus());
535+
txq_info->ntxq = roundup(i, adap->params.nports);
536+
}
527537
txq_info->uldtxq = kcalloc(txq_info->ntxq, sizeof(struct sge_uld_txq),
528538
GFP_KERNEL);
529539
if (!txq_info->uldtxq) {
@@ -546,11 +556,14 @@ static void uld_queue_init(struct adapter *adap, unsigned int uld_type,
546556
struct cxgb4_lld_info *lli)
547557
{
548558
struct sge_uld_rxq_info *rxq_info = adap->sge.uld_rxq_info[uld_type];
559+
int tx_uld_type = TX_ULD(uld_type);
560+
struct sge_uld_txq_info *txq_info = adap->sge.uld_txq_info[tx_uld_type];
549561

550562
lli->rxq_ids = rxq_info->rspq_id;
551563
lli->nrxq = rxq_info->nrxq;
552564
lli->ciq_ids = rxq_info->rspq_id + rxq_info->nrxq;
553565
lli->nciq = rxq_info->nciq;
566+
lli->ntxq = txq_info->ntxq;
554567
}
555568

556569
int t4_uld_mem_alloc(struct adapter *adap)
@@ -634,7 +647,6 @@ static void uld_init(struct adapter *adap, struct cxgb4_lld_info *lld)
634647
lld->ports = adap->port;
635648
lld->vr = &adap->vres;
636649
lld->mtus = adap->params.mtus;
637-
lld->ntxq = adap->sge.ofldqsets;
638650
lld->nchan = adap->params.nports;
639651
lld->nports = adap->params.nports;
640652
lld->wr_cred = adap->params.ofldq_wr_cred;

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