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fred1gaozhenyw
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drm/i915/gvt: Add error handling for intel_gvt_scan_and_shadow_workload
When an error occurs after shadow_indirect_ctx, this patch is to do the proper cleanup and rollback to the original states for shadowed indirect context before the workload is abandoned. v2: - split the mixed several error paths for better review. (Zhenyu) v3: - no return check for clean up functions. (Changbin) v4: - expose and reuse the existing release_shadow_wa_ctx. (Zhenyu) v5: - move the release function to scheduler.c file. (Zhenyu) v6: - move error handling code of intel_gvt_scan_and_shadow_workload to here. (Zhenyu) Signed-off-by: fred gao <fred.gao@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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+22
-16
lines changed

3 files changed

+22
-16
lines changed

drivers/gpu/drm/i915/gvt/execlist.c

Lines changed: 0 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -489,15 +489,6 @@ static void release_shadow_batch_buffer(struct intel_vgpu_workload *workload)
489489
}
490490
}
491491

492-
static void release_shadow_wa_ctx(struct intel_shadow_wa_ctx *wa_ctx)
493-
{
494-
if (!wa_ctx->indirect_ctx.obj)
495-
return;
496-
497-
i915_gem_object_unpin_map(wa_ctx->indirect_ctx.obj);
498-
i915_gem_object_put(wa_ctx->indirect_ctx.obj);
499-
}
500-
501492
static int complete_execlist_workload(struct intel_vgpu_workload *workload)
502493
{
503494
struct intel_vgpu *vgpu = workload->vgpu;

drivers/gpu/drm/i915/gvt/scheduler.c

Lines changed: 21 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -229,6 +229,15 @@ static int copy_workload_to_ring_buffer(struct intel_vgpu_workload *workload)
229229
return 0;
230230
}
231231

232+
void release_shadow_wa_ctx(struct intel_shadow_wa_ctx *wa_ctx)
233+
{
234+
if (!wa_ctx->indirect_ctx.obj)
235+
return;
236+
237+
i915_gem_object_unpin_map(wa_ctx->indirect_ctx.obj);
238+
i915_gem_object_put(wa_ctx->indirect_ctx.obj);
239+
}
240+
232241
/**
233242
* intel_gvt_scan_and_shadow_workload - audit the workload by scanning and
234243
* shadow it as well, include ringbuffer,wa_ctx and ctx.
@@ -263,13 +272,13 @@ int intel_gvt_scan_and_shadow_workload(struct intel_vgpu_workload *workload)
263272

264273
ret = intel_gvt_scan_and_shadow_ringbuffer(workload);
265274
if (ret)
266-
goto out;
275+
goto err_scan;
267276

268277
if ((workload->ring_id == RCS) &&
269278
(workload->wa_ctx.indirect_ctx.size != 0)) {
270279
ret = intel_gvt_scan_and_shadow_wa_ctx(&workload->wa_ctx);
271280
if (ret)
272-
goto out;
281+
goto err_scan;
273282
}
274283

275284
/* pin shadow context by gvt even the shadow context will be pinned
@@ -283,29 +292,34 @@ int intel_gvt_scan_and_shadow_workload(struct intel_vgpu_workload *workload)
283292
if (IS_ERR(ring)) {
284293
ret = PTR_ERR(ring);
285294
gvt_vgpu_err("fail to pin shadow context\n");
286-
goto out;
295+
goto err_shadow;
287296
}
288297

289298
ret = populate_shadow_context(workload);
290299
if (ret)
291-
goto out;
300+
goto err_unpin;
292301

293302
rq = i915_gem_request_alloc(dev_priv->engine[ring_id], shadow_ctx);
294303
if (IS_ERR(rq)) {
295304
gvt_vgpu_err("fail to allocate gem request\n");
296305
ret = PTR_ERR(rq);
297-
goto out;
306+
goto err_unpin;
298307
}
299308

300309
gvt_dbg_sched("ring id %d get i915 gem request %p\n", ring_id, rq);
301310

302311
workload->req = i915_gem_request_get(rq);
303312
ret = copy_workload_to_ring_buffer(workload);
304313
if (ret)
305-
goto out;
314+
goto err_unpin;
306315
workload->shadowed = true;
316+
return 0;
307317

308-
out:
318+
err_unpin:
319+
engine->context_unpin(engine, shadow_ctx);
320+
err_shadow:
321+
release_shadow_wa_ctx(&workload->wa_ctx);
322+
err_scan:
309323
return ret;
310324
}
311325

drivers/gpu/drm/i915/gvt/scheduler.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -140,4 +140,5 @@ int intel_vgpu_init_gvt_context(struct intel_vgpu *vgpu);
140140

141141
void intel_vgpu_clean_gvt_context(struct intel_vgpu *vgpu);
142142

143+
void release_shadow_wa_ctx(struct intel_shadow_wa_ctx *wa_ctx);
143144
#endif

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