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Merge tag 'dmaengine-4.20-rc1' of git://git.infradead.org/users/vkoul/slave-dma
Pull dmaengine updates from Vinod Koul: - Support for ColdFire mcf5441x edma controller - Support for link list mode in sprd dma - More users of managed dmaenginem_async_device_register API - Cyclic mode support in owl dma driver - DT updates for renesas drivers, dma-jz4780 updates and support for JZ4770, JZ4740 and JZ4725B controllers - Removal of deprecated dma_slave_config direction in dmaengine drivers, few more users will be removed in next cycle and eventually removed. - Minor updates to idma64, ioat, pxa, ppc drivers * tag 'dmaengine-4.20-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (66 commits) dmaengine: ppc4xx: fix off-by-one build failure dmaengine: owl: Fix warnings generated during build dmaengine: fsl-edma: remove dma_slave_config direction usage dmaengine: rcar-dmac: set scatter/gather max segment size dmaengine: mmp_tdma: remove dma_slave_config direction usage dmaengine: ep93xx_dma: remove dma_slave_config direction usage dmaengine: k3dma: remove dma_slave_config direction usage dmaengine: k3dma: dont use direction for memcpy dmaengine: imx-dma: remove dma_slave_config direction usage dmaengine: idma: remove dma_slave_config direction usage dmaengine: hsu: remove dma_slave_config direction usage dmaengine: dw: remove dma_slave_config direction usage dmaengine: jz4740: remove dma_slave_config direction usage dmaengine: coh901318: remove dma_slave_config direction usage dmaengine: bcm2835: remove dma_slave_config direction usage dmaengine: at_hdmac: remove dma_slave_config direction usage dmaengine: owl: Add Slave and Cyclic mode support for Actions Semi Owl S900 SoC dmaengine: ioat: fix prototype of ioat_enumerate_channels dmaengine: stm32-dma: check whether length is aligned on FIFO threshold dt-bindings: dmaengine: usb-dmac: Add binding for r8a7744 ...
2 parents 36168d7 + 71f021c commit a41efc2

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lines changed

‎Documentation/devicetree/bindings/dma/jz4780-dma.txt

Lines changed: 10 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,13 @@
22

33
Required properties:
44

5-
- compatible: Should be "ingenic,jz4780-dma"
6-
- reg: Should contain the DMA controller registers location and length.
5+
- compatible: Should be one of:
6+
* ingenic,jz4740-dma
7+
* ingenic,jz4725b-dma
8+
* ingenic,jz4770-dma
9+
* ingenic,jz4780-dma
10+
- reg: Should contain the DMA channel registers location and length, followed
11+
by the DMA controller registers location and length.
712
- interrupts: Should contain the interrupt specifier of the DMA controller.
813
- clocks: Should contain a clock specifier for the JZ4780 PDMA clock.
914
- #dma-cells: Must be <2>. Number of integer cells in the dmas property of
@@ -19,9 +24,10 @@ Optional properties:
1924

2025
Example:
2126

22-
dma: dma@13420000 {
27+
dma: dma-controller@13420000 {
2328
compatible = "ingenic,jz4780-dma";
24-
reg = <0x13420000 0x10000>;
29+
reg = <0x13420000 0x400
30+
0x13421000 0x40>;
2531

2632
interrupt-parent = <&intc>;
2733
interrupts = <10>;

‎Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,7 @@ Required Properties:
1717
- compatible: "renesas,dmac-<soctype>", "renesas,rcar-dmac" as fallback.
1818
Examples with soctypes are:
1919
- "renesas,dmac-r8a7743" (RZ/G1M)
20+
- "renesas,dmac-r8a7744" (RZ/G1N)
2021
- "renesas,dmac-r8a7745" (RZ/G1E)
2122
- "renesas,dmac-r8a77470" (RZ/G1C)
2223
- "renesas,dmac-r8a7790" (R-Car H2)

‎Documentation/devicetree/bindings/dma/renesas,usb-dmac.txt

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,7 @@ Required Properties:
44
-compatible: "renesas,<soctype>-usb-dmac", "renesas,usb-dmac" as fallback.
55
Examples with soctypes are:
66
- "renesas,r8a7743-usb-dmac" (RZ/G1M)
7+
- "renesas,r8a7744-usb-dmac" (RZ/G1N)
78
- "renesas,r8a7745-usb-dmac" (RZ/G1E)
89
- "renesas,r8a7790-usb-dmac" (R-Car H2)
910
- "renesas,r8a7791-usb-dmac" (R-Car M2-W)

‎arch/mips/boot/dts/ingenic/jz4740.dtsi

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -154,6 +154,21 @@
154154
clock-names = "baud", "module";
155155
};
156156

157+
dmac: dma-controller@13020000 {
158+
compatible = "ingenic,jz4740-dma";
159+
reg = <0x13020000 0xbc
160+
0x13020300 0x14>;
161+
#dma-cells = <2>;
162+
163+
interrupt-parent = <&intc>;
164+
interrupts = <29>;
165+
166+
clocks = <&cgu JZ4740_CLK_DMA>;
167+
168+
/* Disable dmac until we have something that uses it */
169+
status = "disabled";
170+
};
171+
157172
uhc: uhc@13030000 {
158173
compatible = "ingenic,jz4740-ohci", "generic-ohci";
159174
reg = <0x13030000 0x1000>;

‎arch/mips/boot/dts/ingenic/jz4770.dtsi

Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -196,6 +196,36 @@
196196
status = "disabled";
197197
};
198198

199+
dmac0: dma-controller@13420000 {
200+
compatible = "ingenic,jz4770-dma";
201+
reg = <0x13420000 0xC0
202+
0x13420300 0x20>;
203+
204+
#dma-cells = <1>;
205+
206+
clocks = <&cgu JZ4770_CLK_DMA>;
207+
interrupt-parent = <&intc>;
208+
interrupts = <24>;
209+
210+
/* Disable dmac0 until we have something that uses it */
211+
status = "disabled";
212+
};
213+
214+
dmac1: dma-controller@13420100 {
215+
compatible = "ingenic,jz4770-dma";
216+
reg = <0x13420100 0xC0
217+
0x13420400 0x20>;
218+
219+
#dma-cells = <1>;
220+
221+
clocks = <&cgu JZ4770_CLK_DMA>;
222+
interrupt-parent = <&intc>;
223+
interrupts = <23>;
224+
225+
/* Disable dmac1 until we have something that uses it */
226+
status = "disabled";
227+
};
228+
199229
uhc: uhc@13430000 {
200230
compatible = "generic-ohci";
201231
reg = <0x13430000 0x1000>;

‎arch/mips/boot/dts/ingenic/jz4780.dtsi

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -266,7 +266,8 @@
266266

267267
dma: dma@13420000 {
268268
compatible = "ingenic,jz4780-dma";
269-
reg = <0x13420000 0x10000>;
269+
reg = <0x13420000 0x400
270+
0x13421000 0x40>;
270271
#dma-cells = <2>;
271272

272273
interrupt-parent = <&intc>;

‎drivers/dma/Kconfig

Lines changed: 12 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -143,7 +143,7 @@ config DMA_JZ4740
143143

144144
config DMA_JZ4780
145145
tristate "JZ4780 DMA support"
146-
depends on MACH_JZ4780 || COMPILE_TEST
146+
depends on MIPS || COMPILE_TEST
147147
select DMA_ENGINE
148148
select DMA_VIRTUAL_CHANNELS
149149
help
@@ -321,6 +321,17 @@ config LPC18XX_DMAMUX
321321
Enable support for DMA on NXP LPC18xx/43xx platforms
322322
with PL080 and multiplexed DMA request lines.
323323

324+
config MCF_EDMA
325+
tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs"
326+
depends on M5441x || COMPILE_TEST
327+
select DMA_ENGINE
328+
select DMA_VIRTUAL_CHANNELS
329+
help
330+
Support the Freescale ColdFire eDMA engine, 64-channel
331+
implementation that performs complex data transfers with
332+
minimal intervention from a host processor.
333+
This module can be found on Freescale ColdFire mcf5441x SoCs.
334+
324335
config MMP_PDMA
325336
bool "MMP PDMA support"
326337
depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST

‎drivers/dma/Makefile

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,8 @@ obj-$(CONFIG_DW_AXI_DMAC) += dw-axi-dmac/
3131
obj-$(CONFIG_DW_DMAC_CORE) += dw/
3232
obj-$(CONFIG_EP93XX_DMA) += ep93xx_dma.o
3333
obj-$(CONFIG_FSL_DMA) += fsldma.o
34-
obj-$(CONFIG_FSL_EDMA) += fsl-edma.o
34+
obj-$(CONFIG_FSL_EDMA) += fsl-edma.o fsl-edma-common.o
35+
obj-$(CONFIG_MCF_EDMA) += mcf-edma.o fsl-edma-common.o
3536
obj-$(CONFIG_FSL_RAID) += fsl_raid.o
3637
obj-$(CONFIG_HSU_DMA) += hsu/
3738
obj-$(CONFIG_IMG_MDC_DMA) += img-mdc-dma.o

‎drivers/dma/at_hdmac.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1320,7 +1320,7 @@ atc_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
13201320
if (unlikely(!is_slave_direction(direction)))
13211321
goto err_out;
13221322

1323-
if (sconfig->direction == DMA_MEM_TO_DEV)
1323+
if (direction == DMA_MEM_TO_DEV)
13241324
reg_width = convert_buswidth(sconfig->dst_addr_width);
13251325
else
13261326
reg_width = convert_buswidth(sconfig->src_addr_width);

‎drivers/dma/at_xdmac.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1600,7 +1600,7 @@ static void at_xdmac_tasklet(unsigned long data)
16001600
if (atchan->status & AT_XDMAC_CIS_ROIS)
16011601
dev_err(chan2dev(&atchan->chan), "request overflow error!!!");
16021602

1603-
spin_lock_bh(&atchan->lock);
1603+
spin_lock(&atchan->lock);
16041604
desc = list_first_entry(&atchan->xfers_list,
16051605
struct at_xdmac_desc,
16061606
xfer_node);
@@ -1610,7 +1610,7 @@ static void at_xdmac_tasklet(unsigned long data)
16101610
txd = &desc->tx_dma_desc;
16111611

16121612
at_xdmac_remove_xfer(atchan, desc);
1613-
spin_unlock_bh(&atchan->lock);
1613+
spin_unlock(&atchan->lock);
16141614

16151615
if (!at_xdmac_chan_is_cyclic(atchan)) {
16161616
dma_cookie_complete(txd);

‎drivers/dma/bcm2835-dma.c

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -778,14 +778,6 @@ static int bcm2835_dma_slave_config(struct dma_chan *chan,
778778
{
779779
struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
780780

781-
if ((cfg->direction == DMA_DEV_TO_MEM &&
782-
cfg->src_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) ||
783-
(cfg->direction == DMA_MEM_TO_DEV &&
784-
cfg->dst_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) ||
785-
!is_slave_direction(cfg->direction)) {
786-
return -EINVAL;
787-
}
788-
789781
c->cfg = *cfg;
790782

791783
return 0;

‎drivers/dma/coh901318.c

Lines changed: 23 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1306,6 +1306,7 @@ struct coh901318_chan {
13061306
unsigned long nbr_active_done;
13071307
unsigned long busy;
13081308

1309+
struct dma_slave_config config;
13091310
u32 addr;
13101311
u32 ctrl;
13111312

@@ -1402,6 +1403,10 @@ static inline struct coh901318_chan *to_coh901318_chan(struct dma_chan *chan)
14021403
return container_of(chan, struct coh901318_chan, chan);
14031404
}
14041405

1406+
static int coh901318_dma_set_runtimeconfig(struct dma_chan *chan,
1407+
struct dma_slave_config *config,
1408+
enum dma_transfer_direction direction);
1409+
14051410
static inline const struct coh901318_params *
14061411
cohc_chan_param(struct coh901318_chan *cohc)
14071412
{
@@ -2360,6 +2365,8 @@ coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
23602365
if (lli == NULL)
23612366
goto err_dma_alloc;
23622367

2368+
coh901318_dma_set_runtimeconfig(chan, &cohc->config, direction);
2369+
23632370
/* initiate allocated lli list */
23642371
ret = coh901318_lli_fill_sg(&cohc->base->pool, lli, sgl, sg_len,
23652372
cohc->addr,
@@ -2499,7 +2506,8 @@ static const struct burst_table burst_sizes[] = {
24992506
};
25002507

25012508
static int coh901318_dma_set_runtimeconfig(struct dma_chan *chan,
2502-
struct dma_slave_config *config)
2509+
struct dma_slave_config *config,
2510+
enum dma_transfer_direction direction)
25032511
{
25042512
struct coh901318_chan *cohc = to_coh901318_chan(chan);
25052513
dma_addr_t addr;
@@ -2509,11 +2517,11 @@ static int coh901318_dma_set_runtimeconfig(struct dma_chan *chan,
25092517
int i = 0;
25102518

25112519
/* We only support mem to per or per to mem transfers */
2512-
if (config->direction == DMA_DEV_TO_MEM) {
2520+
if (direction == DMA_DEV_TO_MEM) {
25132521
addr = config->src_addr;
25142522
addr_width = config->src_addr_width;
25152523
maxburst = config->src_maxburst;
2516-
} else if (config->direction == DMA_MEM_TO_DEV) {
2524+
} else if (direction == DMA_MEM_TO_DEV) {
25172525
addr = config->dst_addr;
25182526
addr_width = config->dst_addr_width;
25192527
maxburst = config->dst_maxburst;
@@ -2579,6 +2587,16 @@ static int coh901318_dma_set_runtimeconfig(struct dma_chan *chan,
25792587
return 0;
25802588
}
25812589

2590+
static int coh901318_dma_slave_config(struct dma_chan *chan,
2591+
struct dma_slave_config *config)
2592+
{
2593+
struct coh901318_chan *cohc = to_coh901318_chan(chan);
2594+
2595+
memcpy(&cohc->config, config, sizeof(*config));
2596+
2597+
return 0;
2598+
}
2599+
25822600
static void coh901318_base_init(struct dma_device *dma, const int *pick_chans,
25832601
struct coh901318_base *base)
25842602
{
@@ -2684,7 +2702,7 @@ static int __init coh901318_probe(struct platform_device *pdev)
26842702
base->dma_slave.device_prep_slave_sg = coh901318_prep_slave_sg;
26852703
base->dma_slave.device_tx_status = coh901318_tx_status;
26862704
base->dma_slave.device_issue_pending = coh901318_issue_pending;
2687-
base->dma_slave.device_config = coh901318_dma_set_runtimeconfig;
2705+
base->dma_slave.device_config = coh901318_dma_slave_config;
26882706
base->dma_slave.device_pause = coh901318_pause;
26892707
base->dma_slave.device_resume = coh901318_resume;
26902708
base->dma_slave.device_terminate_all = coh901318_terminate_all;
@@ -2707,7 +2725,7 @@ static int __init coh901318_probe(struct platform_device *pdev)
27072725
base->dma_memcpy.device_prep_dma_memcpy = coh901318_prep_memcpy;
27082726
base->dma_memcpy.device_tx_status = coh901318_tx_status;
27092727
base->dma_memcpy.device_issue_pending = coh901318_issue_pending;
2710-
base->dma_memcpy.device_config = coh901318_dma_set_runtimeconfig;
2728+
base->dma_memcpy.device_config = coh901318_dma_slave_config;
27112729
base->dma_memcpy.device_pause = coh901318_pause;
27122730
base->dma_memcpy.device_resume = coh901318_resume;
27132731
base->dma_memcpy.device_terminate_all = coh901318_terminate_all;

‎drivers/dma/dma-jz4740.c

Lines changed: 18 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -113,6 +113,7 @@ struct jz4740_dma_desc {
113113
struct jz4740_dmaengine_chan {
114114
struct virt_dma_chan vchan;
115115
unsigned int id;
116+
struct dma_slave_config config;
116117

117118
dma_addr_t fifo_addr;
118119
unsigned int transfer_shift;
@@ -203,8 +204,9 @@ static enum jz4740_dma_transfer_size jz4740_dma_maxburst(u32 maxburst)
203204
return JZ4740_DMA_TRANSFER_SIZE_32BYTE;
204205
}
205206

206-
static int jz4740_dma_slave_config(struct dma_chan *c,
207-
struct dma_slave_config *config)
207+
static int jz4740_dma_slave_config_write(struct dma_chan *c,
208+
struct dma_slave_config *config,
209+
enum dma_transfer_direction direction)
208210
{
209211
struct jz4740_dmaengine_chan *chan = to_jz4740_dma_chan(c);
210212
struct jz4740_dma_dev *dmadev = jz4740_dma_chan_get_dev(chan);
@@ -214,7 +216,7 @@ static int jz4740_dma_slave_config(struct dma_chan *c,
214216
enum jz4740_dma_flags flags;
215217
uint32_t cmd;
216218

217-
switch (config->direction) {
219+
switch (direction) {
218220
case DMA_MEM_TO_DEV:
219221
flags = JZ4740_DMA_SRC_AUTOINC;
220222
transfer_size = jz4740_dma_maxburst(config->dst_maxburst);
@@ -265,6 +267,15 @@ static int jz4740_dma_slave_config(struct dma_chan *c,
265267
return 0;
266268
}
267269

270+
static int jz4740_dma_slave_config(struct dma_chan *c,
271+
struct dma_slave_config *config)
272+
{
273+
struct jz4740_dmaengine_chan *chan = to_jz4740_dma_chan(c);
274+
275+
memcpy(&chan->config, config, sizeof(*config));
276+
return 0;
277+
}
278+
268279
static int jz4740_dma_terminate_all(struct dma_chan *c)
269280
{
270281
struct jz4740_dmaengine_chan *chan = to_jz4740_dma_chan(c);
@@ -407,6 +418,8 @@ static struct dma_async_tx_descriptor *jz4740_dma_prep_slave_sg(
407418
desc->direction = direction;
408419
desc->cyclic = false;
409420

421+
jz4740_dma_slave_config_write(c, &chan->config, direction);
422+
410423
return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags);
411424
}
412425

@@ -438,6 +451,8 @@ static struct dma_async_tx_descriptor *jz4740_dma_prep_dma_cyclic(
438451
desc->direction = direction;
439452
desc->cyclic = true;
440453

454+
jz4740_dma_slave_config_write(c, &chan->config, direction);
455+
441456
return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags);
442457
}
443458

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