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torvaldstorvalds
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Merge branch 'timers/core' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer code update from Thomas Gleixner: - armada SoC clocksource overhaul with a trivial merge conflict - Minor improvements to various SoC clocksource drivers * 'timers/core' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: clocksource: armada-370-xp: Add detailed clock requirements in devicetree binding clocksource: armada-370-xp: Get reference fixed-clock by name clocksource: armada-370-xp: Replace WARN_ON with BUG_ON clocksource: armada-370-xp: Fix device-tree binding clocksource: armada-370-xp: Introduce new compatibles clocksource: armada-370-xp: Use CLOCKSOURCE_OF_DECLARE clocksource: armada-370-xp: Simplify TIMER_CTRL register access clocksource: armada-370-xp: Use BIT() ARM: timer-sp: Set dynamic irq affinity ARM: nomadik: add dynamic irq flag to the timer clocksource: sh_cmt: 32-bit control register support clocksource: em_sti: Convert to devm_* managed helpers
2 parents 3369d11 + 63ce2cc commit a4ae54f

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8 files changed

+164
-128
lines changed

8 files changed

+164
-128
lines changed

‎Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt

Lines changed: 31 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -2,14 +2,40 @@ Marvell Armada 370 and Armada XP Timers
22
---------------------------------------
33

44
Required properties:
5-
- compatible: Should be "marvell,armada-370-xp-timer"
5+
- compatible: Should be either "marvell,armada-370-timer" or
6+
"marvell,armada-xp-timer" as appropriate.
67
- interrupts: Should contain the list of Global Timer interrupts and
78
then local timer interrupts
89
- reg: Should contain location and length for timers register. First
910
pair for the Global Timer registers, second pair for the
1011
local/private timers.
11-
- clocks: clock driving the timer hardware
1212

13-
Optional properties:
14-
- marvell,timer-25Mhz: Tells whether the Global timer supports the 25
15-
Mhz fixed mode (available on Armada XP and not on Armada 370)
13+
Clocks required for compatible = "marvell,armada-370-timer":
14+
- clocks : Must contain a single entry describing the clock input
15+
16+
Clocks required for compatible = "marvell,armada-xp-timer":
17+
- clocks : Must contain an entry for each entry in clock-names.
18+
- clock-names : Must include the following entries:
19+
"nbclk" (L2/coherency fabric clock),
20+
"fixed" (Reference 25 MHz fixed-clock).
21+
22+
Examples:
23+
24+
- Armada 370:
25+
26+
timer {
27+
compatible = "marvell,armada-370-timer";
28+
reg = <0x20300 0x30>, <0x21040 0x30>;
29+
interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
30+
clocks = <&coreclk 2>;
31+
};
32+
33+
- Armada XP:
34+
35+
timer {
36+
compatible = "marvell,armada-xp-timer";
37+
reg = <0x20300 0x30>, <0x21040 0x30>;
38+
interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
39+
clocks = <&coreclk 2>, <&refclk>;
40+
clock-names = "nbclk", "fixed";
41+
};

‎arch/arm/common/timer-sp.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -166,7 +166,8 @@ static int sp804_set_next_event(unsigned long next,
166166
}
167167

168168
static struct clock_event_device sp804_clockevent = {
169-
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
169+
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
170+
CLOCK_EVT_FEAT_DYNIRQ,
170171
.set_mode = sp804_set_mode,
171172
.set_next_event = sp804_set_next_event,
172173
.rating = 300,

‎arch/arm/mach-mvebu/armada-370-xp.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@
1818
#include <linux/of_address.h>
1919
#include <linux/of_platform.h>
2020
#include <linux/io.h>
21-
#include <linux/time-armada-370-xp.h>
21+
#include <linux/clocksource.h>
2222
#include <linux/dma-mapping.h>
2323
#include <linux/mbus.h>
2424
#include <asm/hardware/cache-l2x0.h>
@@ -37,7 +37,7 @@ static void __init armada_370_xp_map_io(void)
3737
static void __init armada_370_xp_timer_and_clk_init(void)
3838
{
3939
of_clk_init(NULL);
40-
armada_370_xp_timer_init();
40+
clocksource_of_init();
4141
coherency_init();
4242
BUG_ON(mvebu_mbus_dt_init());
4343
#ifdef CONFIG_CACHE_L2X0

‎drivers/clocksource/em_sti.c

Lines changed: 14 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -315,68 +315,47 @@ static int em_sti_probe(struct platform_device *pdev)
315315
{
316316
struct em_sti_priv *p;
317317
struct resource *res;
318-
int irq, ret;
318+
int irq;
319319

320-
p = kzalloc(sizeof(*p), GFP_KERNEL);
320+
p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
321321
if (p == NULL) {
322322
dev_err(&pdev->dev, "failed to allocate driver data\n");
323-
ret = -ENOMEM;
324-
goto err0;
323+
return -ENOMEM;
325324
}
326325

327326
p->pdev = pdev;
328327
platform_set_drvdata(pdev, p);
329328

330-
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
331-
if (!res) {
332-
dev_err(&pdev->dev, "failed to get I/O memory\n");
333-
ret = -EINVAL;
334-
goto err0;
335-
}
336-
337329
irq = platform_get_irq(pdev, 0);
338330
if (irq < 0) {
339331
dev_err(&pdev->dev, "failed to get irq\n");
340-
ret = -EINVAL;
341-
goto err0;
332+
return -EINVAL;
342333
}
343334

344335
/* map memory, let base point to the STI instance */
345-
p->base = ioremap_nocache(res->start, resource_size(res));
346-
if (p->base == NULL) {
347-
dev_err(&pdev->dev, "failed to remap I/O memory\n");
348-
ret = -ENXIO;
349-
goto err0;
350-
}
336+
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
337+
p->base = devm_ioremap_resource(&pdev->dev, res);
338+
if (IS_ERR(p->base))
339+
return PTR_ERR(p->base);
351340

352341
/* get hold of clock */
353-
p->clk = clk_get(&pdev->dev, "sclk");
342+
p->clk = devm_clk_get(&pdev->dev, "sclk");
354343
if (IS_ERR(p->clk)) {
355344
dev_err(&pdev->dev, "cannot get clock\n");
356-
ret = PTR_ERR(p->clk);
357-
goto err1;
345+
return PTR_ERR(p->clk);
358346
}
359347

360-
if (request_irq(irq, em_sti_interrupt,
361-
IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
362-
dev_name(&pdev->dev), p)) {
348+
if (devm_request_irq(&pdev->dev, irq, em_sti_interrupt,
349+
IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
350+
dev_name(&pdev->dev), p)) {
363351
dev_err(&pdev->dev, "failed to request low IRQ\n");
364-
ret = -ENOENT;
365-
goto err2;
352+
return -ENOENT;
366353
}
367354

368355
raw_spin_lock_init(&p->lock);
369356
em_sti_register_clockevent(p);
370357
em_sti_register_clocksource(p);
371358
return 0;
372-
373-
err2:
374-
clk_put(p->clk);
375-
err1:
376-
iounmap(p->base);
377-
err0:
378-
kfree(p);
379-
return ret;
380359
}
381360

382361
static int em_sti_remove(struct platform_device *pdev)

‎drivers/clocksource/nomadik-mtu.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -165,7 +165,8 @@ static void nmdk_clkevt_resume(struct clock_event_device *cedev)
165165

166166
static struct clock_event_device nmdk_clkevt = {
167167
.name = "mtu_1",
168-
.features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
168+
.features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC |
169+
CLOCK_EVT_FEAT_DYNIRQ,
169170
.rating = 200,
170171
.set_mode = nmdk_clkevt_mode,
171172
.set_next_event = nmdk_clkevt_next,

‎drivers/clocksource/sh_cmt.c

Lines changed: 36 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -37,6 +37,7 @@
3737

3838
struct sh_cmt_priv {
3939
void __iomem *mapbase;
40+
void __iomem *mapbase_str;
4041
struct clk *clk;
4142
unsigned long width; /* 16 or 32 bit version of hardware block */
4243
unsigned long overflow_bit;
@@ -79,6 +80,12 @@ struct sh_cmt_priv {
7980
* CMCSR 0xffca0060 16-bit
8081
* CMCNT 0xffca0064 32-bit
8182
* CMCOR 0xffca0068 32-bit
83+
*
84+
* "32-bit counter and 32-bit control" as found on r8a73a4 and r8a7790:
85+
* CMSTR 0xffca0500 32-bit
86+
* CMCSR 0xffca0510 32-bit
87+
* CMCNT 0xffca0514 32-bit
88+
* CMCOR 0xffca0518 32-bit
8289
*/
8390

8491
static unsigned long sh_cmt_read16(void __iomem *base, unsigned long offs)
@@ -109,9 +116,7 @@ static void sh_cmt_write32(void __iomem *base, unsigned long offs,
109116

110117
static inline unsigned long sh_cmt_read_cmstr(struct sh_cmt_priv *p)
111118
{
112-
struct sh_timer_config *cfg = p->pdev->dev.platform_data;
113-
114-
return p->read_control(p->mapbase - cfg->channel_offset, 0);
119+
return p->read_control(p->mapbase_str, 0);
115120
}
116121

117122
static inline unsigned long sh_cmt_read_cmcsr(struct sh_cmt_priv *p)
@@ -127,9 +132,7 @@ static inline unsigned long sh_cmt_read_cmcnt(struct sh_cmt_priv *p)
127132
static inline void sh_cmt_write_cmstr(struct sh_cmt_priv *p,
128133
unsigned long value)
129134
{
130-
struct sh_timer_config *cfg = p->pdev->dev.platform_data;
131-
132-
p->write_control(p->mapbase - cfg->channel_offset, 0, value);
135+
p->write_control(p->mapbase_str, 0, value);
133136
}
134137

135138
static inline void sh_cmt_write_cmcsr(struct sh_cmt_priv *p,
@@ -676,7 +679,7 @@ static int sh_cmt_register(struct sh_cmt_priv *p, char *name,
676679
static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
677680
{
678681
struct sh_timer_config *cfg = pdev->dev.platform_data;
679-
struct resource *res;
682+
struct resource *res, *res2;
680683
int irq, ret;
681684
ret = -ENXIO;
682685

@@ -694,6 +697,9 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
694697
goto err0;
695698
}
696699

700+
/* optional resource for the shared timer start/stop register */
701+
res2 = platform_get_resource(p->pdev, IORESOURCE_MEM, 1);
702+
697703
irq = platform_get_irq(p->pdev, 0);
698704
if (irq < 0) {
699705
dev_err(&p->pdev->dev, "failed to get irq\n");
@@ -707,6 +713,15 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
707713
goto err0;
708714
}
709715

716+
/* map second resource for CMSTR */
717+
p->mapbase_str = ioremap_nocache(res2 ? res2->start :
718+
res->start - cfg->channel_offset,
719+
res2 ? resource_size(res2) : 2);
720+
if (p->mapbase_str == NULL) {
721+
dev_err(&p->pdev->dev, "failed to remap I/O second memory\n");
722+
goto err1;
723+
}
724+
710725
/* request irq using setup_irq() (too early for request_irq()) */
711726
p->irqaction.name = dev_name(&p->pdev->dev);
712727
p->irqaction.handler = sh_cmt_interrupt;
@@ -719,11 +734,17 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
719734
if (IS_ERR(p->clk)) {
720735
dev_err(&p->pdev->dev, "cannot get clock\n");
721736
ret = PTR_ERR(p->clk);
722-
goto err1;
737+
goto err2;
723738
}
724739

725-
p->read_control = sh_cmt_read16;
726-
p->write_control = sh_cmt_write16;
740+
if (res2 && (resource_size(res2) == 4)) {
741+
/* assume both CMSTR and CMCSR to be 32-bit */
742+
p->read_control = sh_cmt_read32;
743+
p->write_control = sh_cmt_write32;
744+
} else {
745+
p->read_control = sh_cmt_read16;
746+
p->write_control = sh_cmt_write16;
747+
}
727748

728749
if (resource_size(res) == 6) {
729750
p->width = 16;
@@ -752,22 +773,23 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
752773
cfg->clocksource_rating);
753774
if (ret) {
754775
dev_err(&p->pdev->dev, "registration failed\n");
755-
goto err2;
776+
goto err3;
756777
}
757778
p->cs_enabled = false;
758779

759780
ret = setup_irq(irq, &p->irqaction);
760781
if (ret) {
761782
dev_err(&p->pdev->dev, "failed to request irq %d\n", irq);
762-
goto err2;
783+
goto err3;
763784
}
764785

765786
platform_set_drvdata(pdev, p);
766787

767788
return 0;
768-
err2:
789+
err3:
769790
clk_put(p->clk);
770-
791+
err2:
792+
iounmap(p->mapbase_str);
771793
err1:
772794
iounmap(p->mapbase);
773795
err0:

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