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bebarinobebarino
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Merge branch 'clk-rate-range' into clk-next
 - Various clk rate range fixes - Drop clk rate range constraints on clk_put() (redux) * clk-rate-range: (28 commits) clk: mediatek: clk-mux: Add .determine_rate() callback clk: tests: Add tests for notifiers clk: Update req_rate on __clk_recalc_rates() clk: tests: Add missing test case for ranges clk: qcom: clk-rcg2: Take clock boundaries into consideration for gfx3d clk: Introduce the clk_hw_get_rate_range function clk: Zero the clk_rate_request structure clk: Stop forwarding clk_rate_requests to the parent clk: Constify clk_has_parent() clk: Introduce clk_core_has_parent() clk: Switch from __clk_determine_rate to clk_core_round_rate_nolock clk: Add our request boundaries in clk_core_init_rate_req clk: Introduce clk_hw_init_rate_request() clk: Move clk_core_init_rate_req() from clk_core_round_rate_nolock() to its caller clk: Change clk_core_init_rate_req prototype clk: Set req_rate on reparenting clk: Take into account uncached clocks in clk_set_rate_range() clk: tests: Add some tests for orphan with multiple parents clk: tests: Add tests for mux with multiple parents clk: tests: Add tests for single parent mux ...
2 parents c461c67 + b05ea33 commit a7b78be

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11 files changed

+1856
-150
lines changed

11 files changed

+1856
-150
lines changed

‎drivers/clk/at91/clk-generated.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -136,7 +136,6 @@ static int clk_generated_determine_rate(struct clk_hw *hw,
136136
{
137137
struct clk_generated *gck = to_clk_generated(hw);
138138
struct clk_hw *parent = NULL;
139-
struct clk_rate_request req_parent = *req;
140139
long best_rate = -EINVAL;
141140
unsigned long min_rate, parent_rate;
142141
int best_diff = -1;
@@ -192,7 +191,9 @@ static int clk_generated_determine_rate(struct clk_hw *hw,
192191
goto end;
193192

194193
for (div = 1; div < GENERATED_MAX_DIV + 2; div++) {
195-
req_parent.rate = req->rate * div;
194+
struct clk_rate_request req_parent;
195+
196+
clk_hw_forward_rate_request(hw, req, parent, &req_parent, req->rate * div);
196197
if (__clk_determine_rate(parent, &req_parent))
197198
continue;
198199
clk_generated_best_diff(req, parent, req_parent.rate, div,

‎drivers/clk/at91/clk-master.c

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -581,7 +581,6 @@ static int clk_sama7g5_master_determine_rate(struct clk_hw *hw,
581581
struct clk_rate_request *req)
582582
{
583583
struct clk_master *master = to_clk_master(hw);
584-
struct clk_rate_request req_parent = *req;
585584
struct clk_hw *parent;
586585
long best_rate = LONG_MIN, best_diff = LONG_MIN;
587586
unsigned long parent_rate;
@@ -618,11 +617,15 @@ static int clk_sama7g5_master_determine_rate(struct clk_hw *hw,
618617
goto end;
619618

620619
for (div = 0; div < MASTER_PRES_MAX + 1; div++) {
620+
struct clk_rate_request req_parent;
621+
unsigned long req_rate;
622+
621623
if (div == MASTER_PRES_MAX)
622-
req_parent.rate = req->rate * 3;
624+
req_rate = req->rate * 3;
623625
else
624-
req_parent.rate = req->rate << div;
626+
req_rate = req->rate << div;
625627

628+
clk_hw_forward_rate_request(hw, req, parent, &req_parent, req_rate);
626629
if (__clk_determine_rate(parent, &req_parent))
627630
continue;
628631

‎drivers/clk/at91/clk-peripheral.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -269,7 +269,6 @@ static int clk_sam9x5_peripheral_determine_rate(struct clk_hw *hw,
269269
{
270270
struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
271271
struct clk_hw *parent = clk_hw_get_parent(hw);
272-
struct clk_rate_request req_parent = *req;
273272
unsigned long parent_rate = clk_hw_get_rate(parent);
274273
unsigned long tmp_rate;
275274
long best_rate = LONG_MIN;
@@ -302,8 +301,9 @@ static int clk_sam9x5_peripheral_determine_rate(struct clk_hw *hw,
302301
goto end;
303302

304303
for (shift = 0; shift <= PERIPHERAL_MAX_SHIFT; shift++) {
305-
req_parent.rate = req->rate << shift;
304+
struct clk_rate_request req_parent;
306305

306+
clk_hw_forward_rate_request(hw, req, parent, &req_parent, req->rate << shift);
307307
if (__clk_determine_rate(parent, &req_parent))
308308
continue;
309309

‎drivers/clk/clk-composite.c

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -85,10 +85,11 @@ static int clk_composite_determine_rate(struct clk_hw *hw,
8585
req->best_parent_hw = NULL;
8686

8787
if (clk_hw_get_flags(hw) & CLK_SET_RATE_NO_REPARENT) {
88-
struct clk_rate_request tmp_req = *req;
88+
struct clk_rate_request tmp_req;
8989

9090
parent = clk_hw_get_parent(mux_hw);
9191

92+
clk_hw_forward_rate_request(hw, req, parent, &tmp_req, req->rate);
9293
ret = clk_composite_determine_rate_for_parent(rate_hw,
9394
&tmp_req,
9495
parent,
@@ -104,12 +105,13 @@ static int clk_composite_determine_rate(struct clk_hw *hw,
104105
}
105106

106107
for (i = 0; i < clk_hw_get_num_parents(mux_hw); i++) {
107-
struct clk_rate_request tmp_req = *req;
108+
struct clk_rate_request tmp_req;
108109

109110
parent = clk_hw_get_parent_by_index(mux_hw, i);
110111
if (!parent)
111112
continue;
112113

114+
clk_hw_forward_rate_request(hw, req, parent, &tmp_req, req->rate);
113115
ret = clk_composite_determine_rate_for_parent(rate_hw,
114116
&tmp_req,
115117
parent,

‎drivers/clk/clk-divider.c

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -386,13 +386,13 @@ long divider_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent,
386386
const struct clk_div_table *table,
387387
u8 width, unsigned long flags)
388388
{
389-
struct clk_rate_request req = {
390-
.rate = rate,
391-
.best_parent_rate = *prate,
392-
.best_parent_hw = parent,
393-
};
389+
struct clk_rate_request req;
394390
int ret;
395391

392+
clk_hw_init_rate_request(hw, &req, rate);
393+
req.best_parent_rate = *prate;
394+
req.best_parent_hw = parent;
395+
396396
ret = divider_determine_rate(hw, &req, table, width, flags);
397397
if (ret)
398398
return ret;
@@ -408,13 +408,13 @@ long divider_ro_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent,
408408
const struct clk_div_table *table, u8 width,
409409
unsigned long flags, unsigned int val)
410410
{
411-
struct clk_rate_request req = {
412-
.rate = rate,
413-
.best_parent_rate = *prate,
414-
.best_parent_hw = parent,
415-
};
411+
struct clk_rate_request req;
416412
int ret;
417413

414+
clk_hw_init_rate_request(hw, &req, rate);
415+
req.best_parent_rate = *prate;
416+
req.best_parent_hw = parent;
417+
418418
ret = divider_ro_determine_rate(hw, &req, table, width, flags, val);
419419
if (ret)
420420
return ret;

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