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Gustavo Padovandanvet
Gustavo Padovan
authored and
danvet
committed
drm/i915: remove intel_crtc_cursor_set_obj() (v5)
Merge it into the plane update_plane() callback and make other users use the update_plane() functions instead. The fb != crtc->cursor->fb was already inside intel_crtc_cursor_set_obj() so we fold intel_crtc_cursor_set_obj() inside intel_commit_cursor_plane() and merge both paths into one. v5 (by Matt): - Rebase onto latest di-nightly codebase - Drop extra unreference call when we fail to pin (Ville) Reviewed-by(v4): Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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‎drivers/gpu/drm/i915/intel_display.c

Lines changed: 99 additions & 116 deletions
Original file line numberDiff line numberDiff line change
@@ -8417,109 +8417,6 @@ static bool cursor_size_ok(struct drm_device *dev,
84178417
return true;
84188418
}
84198419

8420-
static int intel_crtc_cursor_set_obj(struct drm_crtc *crtc,
8421-
struct drm_i915_gem_object *obj,
8422-
uint32_t width, uint32_t height)
8423-
{
8424-
struct drm_device *dev = crtc->dev;
8425-
struct drm_i915_private *dev_priv = to_i915(dev);
8426-
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
8427-
enum pipe pipe = intel_crtc->pipe;
8428-
unsigned old_width;
8429-
uint32_t addr;
8430-
int ret;
8431-
8432-
/* if we want to turn off the cursor ignore width and height */
8433-
if (!obj) {
8434-
DRM_DEBUG_KMS("cursor off\n");
8435-
addr = 0;
8436-
mutex_lock(&dev->struct_mutex);
8437-
goto finish;
8438-
}
8439-
8440-
/* we only need to pin inside GTT if cursor is non-phy */
8441-
mutex_lock(&dev->struct_mutex);
8442-
if (!INTEL_INFO(dev)->cursor_needs_physical) {
8443-
unsigned alignment;
8444-
8445-
/*
8446-
* Global gtt pte registers are special registers which actually
8447-
* forward writes to a chunk of system memory. Which means that
8448-
* there is no risk that the register values disappear as soon
8449-
* as we call intel_runtime_pm_put(), so it is correct to wrap
8450-
* only the pin/unpin/fence and not more.
8451-
*/
8452-
intel_runtime_pm_get(dev_priv);
8453-
8454-
/* Note that the w/a also requires 2 PTE of padding following
8455-
* the bo. We currently fill all unused PTE with the shadow
8456-
* page and so we should always have valid PTE following the
8457-
* cursor preventing the VT-d warning.
8458-
*/
8459-
alignment = 0;
8460-
if (need_vtd_wa(dev))
8461-
alignment = 64*1024;
8462-
8463-
ret = i915_gem_object_pin_to_display_plane(obj, alignment, NULL);
8464-
if (ret) {
8465-
DRM_DEBUG_KMS("failed to move cursor bo into the GTT\n");
8466-
intel_runtime_pm_put(dev_priv);
8467-
goto fail_locked;
8468-
}
8469-
8470-
ret = i915_gem_object_put_fence(obj);
8471-
if (ret) {
8472-
DRM_DEBUG_KMS("failed to release fence for cursor");
8473-
intel_runtime_pm_put(dev_priv);
8474-
goto fail_unpin;
8475-
}
8476-
8477-
addr = i915_gem_obj_ggtt_offset(obj);
8478-
8479-
intel_runtime_pm_put(dev_priv);
8480-
} else {
8481-
int align = IS_I830(dev) ? 16 * 1024 : 256;
8482-
ret = i915_gem_object_attach_phys(obj, align);
8483-
if (ret) {
8484-
DRM_DEBUG_KMS("failed to attach phys object\n");
8485-
goto fail_locked;
8486-
}
8487-
addr = obj->phys_handle->busaddr;
8488-
}
8489-
8490-
finish:
8491-
if (intel_crtc->cursor_bo) {
8492-
if (!INTEL_INFO(dev)->cursor_needs_physical)
8493-
i915_gem_object_unpin_from_display_plane(intel_crtc->cursor_bo);
8494-
}
8495-
8496-
i915_gem_track_fb(intel_crtc->cursor_bo, obj,
8497-
INTEL_FRONTBUFFER_CURSOR(pipe));
8498-
mutex_unlock(&dev->struct_mutex);
8499-
8500-
old_width = intel_crtc->cursor_width;
8501-
8502-
intel_crtc->cursor_addr = addr;
8503-
intel_crtc->cursor_bo = obj;
8504-
intel_crtc->cursor_width = width;
8505-
intel_crtc->cursor_height = height;
8506-
8507-
if (intel_crtc->active) {
8508-
if (old_width != width)
8509-
intel_update_watermarks(crtc);
8510-
intel_crtc_update_cursor(crtc, intel_crtc->cursor_bo != NULL);
8511-
8512-
intel_frontbuffer_flip(dev, INTEL_FRONTBUFFER_CURSOR(pipe));
8513-
}
8514-
8515-
return 0;
8516-
fail_unpin:
8517-
i915_gem_object_unpin_from_display_plane(obj);
8518-
fail_locked:
8519-
mutex_unlock(&dev->struct_mutex);
8520-
return ret;
8521-
}
8522-
85238420
static void intel_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
85248421
u16 *blue, uint32_t start, uint32_t size)
85258422
{
@@ -12129,7 +12026,8 @@ intel_cursor_plane_disable(struct drm_plane *plane)
1212912026

1213012027
BUG_ON(!plane->crtc);
1213112028

12132-
return intel_crtc_cursor_set_obj(plane->crtc, NULL, 0, 0);
12029+
return plane->funcs->update_plane(plane, plane->crtc, NULL,
12030+
0, 0, 0, 0, 0, 0, 0, 0);
1213312031
}
1213412032

1213512033
static int
@@ -12193,12 +12091,15 @@ intel_commit_cursor_plane(struct drm_plane *plane,
1219312091
struct intel_plane_state *state)
1219412092
{
1219512093
struct drm_crtc *crtc = state->crtc;
12196-
struct drm_framebuffer *fb = state->fb;
12094+
struct drm_device *dev = crtc->dev;
12095+
struct drm_i915_private *dev_priv = dev->dev_private;
1219712096
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1219812097
struct intel_plane *intel_plane = to_intel_plane(plane);
12199-
struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
12200-
struct drm_i915_gem_object *obj = intel_fb->obj;
12201-
int crtc_w, crtc_h;
12098+
struct drm_i915_gem_object *obj = intel_fb_obj(state->fb);
12099+
enum pipe pipe = intel_crtc->pipe;
12100+
unsigned old_width;
12101+
uint32_t addr;
12102+
int ret;
1220212103

1220312104
crtc->cursor_x = state->orig_dst.x1;
1220412105
crtc->cursor_y = state->orig_dst.y1;
@@ -12213,18 +12114,100 @@ intel_commit_cursor_plane(struct drm_plane *plane,
1221312114
intel_plane->src_h = drm_rect_height(&state->orig_src);
1221412115
intel_plane->obj = obj;
1221512116

12216-
if (fb != crtc->cursor->fb) {
12217-
crtc_w = drm_rect_width(&state->orig_dst);
12218-
crtc_h = drm_rect_height(&state->orig_dst);
12219-
return intel_crtc_cursor_set_obj(crtc, obj, crtc_w, crtc_h);
12117+
if (intel_crtc->cursor_bo == obj)
12118+
goto update;
12119+
12120+
/* if we want to turn off the cursor ignore width and height */
12121+
if (!obj) {
12122+
DRM_DEBUG_KMS("cursor off\n");
12123+
addr = 0;
12124+
mutex_lock(&dev->struct_mutex);
12125+
goto finish;
12126+
}
12127+
12128+
/* we only need to pin inside GTT if cursor is non-phy */
12129+
mutex_lock(&dev->struct_mutex);
12130+
if (!INTEL_INFO(dev)->cursor_needs_physical) {
12131+
unsigned alignment;
12132+
12133+
/*
12134+
* Global gtt pte registers are special registers which actually
12135+
* forward writes to a chunk of system memory. Which means that
12136+
* there is no risk that the register values disappear as soon
12137+
* as we call intel_runtime_pm_put(), so it is correct to wrap
12138+
* only the pin/unpin/fence and not more.
12139+
*/
12140+
intel_runtime_pm_get(dev_priv);
12141+
12142+
/* Note that the w/a also requires 2 PTE of padding following
12143+
* the bo. We currently fill all unused PTE with the shadow
12144+
* page and so we should always have valid PTE following the
12145+
* cursor preventing the VT-d warning.
12146+
*/
12147+
alignment = 0;
12148+
if (need_vtd_wa(dev))
12149+
alignment = 64*1024;
12150+
12151+
ret = i915_gem_object_pin_to_display_plane(obj, alignment, NULL);
12152+
if (ret) {
12153+
DRM_DEBUG_KMS("failed to move cursor bo into the GTT\n");
12154+
intel_runtime_pm_put(dev_priv);
12155+
goto fail_locked;
12156+
}
12157+
12158+
ret = i915_gem_object_put_fence(obj);
12159+
if (ret) {
12160+
DRM_DEBUG_KMS("failed to release fence for cursor");
12161+
intel_runtime_pm_put(dev_priv);
12162+
goto fail_unpin;
12163+
}
12164+
12165+
addr = i915_gem_obj_ggtt_offset(obj);
12166+
12167+
intel_runtime_pm_put(dev_priv);
12168+
1222012169
} else {
12221-
intel_crtc_update_cursor(crtc, state->visible);
12170+
int align = IS_I830(dev) ? 16 * 1024 : 256;
12171+
ret = i915_gem_object_attach_phys(obj, align);
12172+
if (ret) {
12173+
DRM_DEBUG_KMS("failed to attach phys object\n");
12174+
goto fail_locked;
12175+
}
12176+
addr = obj->phys_handle->busaddr;
12177+
}
1222212178

12223-
intel_frontbuffer_flip(crtc->dev,
12224-
INTEL_FRONTBUFFER_CURSOR(intel_crtc->pipe));
12179+
finish:
12180+
if (intel_crtc->cursor_bo) {
12181+
if (!INTEL_INFO(dev)->cursor_needs_physical)
12182+
i915_gem_object_unpin_from_display_plane(intel_crtc->cursor_bo);
12183+
}
1222512184

12226-
return 0;
12185+
i915_gem_track_fb(intel_crtc->cursor_bo, obj,
12186+
INTEL_FRONTBUFFER_CURSOR(pipe));
12187+
mutex_unlock(&dev->struct_mutex);
12188+
12189+
intel_crtc->cursor_addr = addr;
12190+
intel_crtc->cursor_bo = obj;
12191+
update:
12192+
old_width = intel_crtc->cursor_width;
12193+
12194+
intel_crtc->cursor_width = drm_rect_width(&state->orig_dst);
12195+
intel_crtc->cursor_height = drm_rect_height(&state->orig_dst);
12196+
12197+
if (intel_crtc->active) {
12198+
if (old_width != intel_crtc->cursor_width)
12199+
intel_update_watermarks(crtc);
12200+
intel_crtc_update_cursor(crtc, state->visible);
12201+
12202+
intel_frontbuffer_flip(dev, INTEL_FRONTBUFFER_CURSOR(pipe));
1222712203
}
12204+
12205+
return 0;
12206+
fail_unpin:
12207+
i915_gem_object_unpin_from_display_plane(obj);
12208+
fail_locked:
12209+
mutex_unlock(&dev->struct_mutex);
12210+
return ret;
1222812211
}
1222912212

1223012213
static int

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