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vijendarmukundabroonie
vijendarmukunda
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ASoC: amd: add ACP3x PCM platform driver
PCM platform driver binds to the platform device created by ACP3x PCI device. PCM driver registers ALSA DMA and CPU DAI components with ASoC framework. Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com> Tested-by: Ravulapati Vishnu vardhan Rao <Vishnuvardhanrao.Ravulapati@amd.com> Signed-off-by: Vijendar Mukunda <vijendar.mukunda@amd.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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‎sound/soc/amd/raven/acp3x-pcm-dma.c

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/*
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* AMD ALSA SoC PCM Driver
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*
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* Copyright 2016 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/platform_device.h>
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#include <linux/module.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/soc-dai.h>
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#include "acp3x.h"
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#define DRV_NAME "acp3x-i2s-audio"
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struct i2s_dev_data {
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void __iomem *acp3x_base;
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struct snd_pcm_substream *play_stream;
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struct snd_pcm_substream *capture_stream;
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};
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static int acp3x_power_on(void __iomem *acp3x_base, bool on)
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{
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u16 val, mask;
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u32 timeout;
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if (on == true) {
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val = 1;
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mask = ACP3x_POWER_ON;
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} else {
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val = 0;
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mask = ACP3x_POWER_OFF;
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}
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rv_writel(val, acp3x_base + mmACP_PGFSM_CONTROL);
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timeout = 0;
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while (true) {
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val = rv_readl(acp3x_base + mmACP_PGFSM_STATUS);
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if ((val & ACP3x_POWER_OFF_IN_PROGRESS) == mask)
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break;
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if (timeout > 100) {
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pr_err("ACP3x power state change failure\n");
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return -ENODEV;
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}
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timeout++;
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cpu_relax();
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}
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return 0;
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}
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static int acp3x_reset(void __iomem *acp3x_base)
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{
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u32 val, timeout;
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rv_writel(1, acp3x_base + mmACP_SOFT_RESET);
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timeout = 0;
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while (true) {
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val = rv_readl(acp3x_base + mmACP_SOFT_RESET);
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if ((val & ACP3x_SOFT_RESET__SoftResetAudDone_MASK) ||
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timeout > 100) {
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if (val & ACP3x_SOFT_RESET__SoftResetAudDone_MASK)
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break;
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return -ENODEV;
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}
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timeout++;
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cpu_relax();
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}
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rv_writel(0, acp3x_base + mmACP_SOFT_RESET);
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timeout = 0;
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while (true) {
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val = rv_readl(acp3x_base + mmACP_SOFT_RESET);
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if (!val || timeout > 100) {
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if (!val)
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break;
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return -ENODEV;
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}
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timeout++;
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cpu_relax();
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}
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return 0;
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}
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static int acp3x_init(void __iomem *acp3x_base)
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{
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int ret;
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/* power on */
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ret = acp3x_power_on(acp3x_base, true);
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if (ret) {
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pr_err("ACP3x power on failed\n");
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return ret;
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}
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/* Reset */
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ret = acp3x_reset(acp3x_base);
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if (ret) {
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pr_err("ACP3x reset failed\n");
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return ret;
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}
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return 0;
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}
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static int acp3x_deinit(void __iomem *acp3x_base)
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{
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int ret;
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/* Reset */
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ret = acp3x_reset(acp3x_base);
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if (ret) {
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pr_err("ACP3x reset failed\n");
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return ret;
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}
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/* power off */
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ret = acp3x_power_on(acp3x_base, false);
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if (ret) {
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pr_err("ACP3x power off failed\n");
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return ret;
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}
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return 0;
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}
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static struct snd_pcm_ops acp3x_dma_ops = {
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.open = NULL,
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.close = NULL,
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.ioctl = NULL,
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.hw_params = NULL,
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.hw_free = NULL,
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.pointer = NULL,
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.mmap = NULL,
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};
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struct snd_soc_dai_ops acp3x_dai_i2s_ops = {
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.hw_params = NULL,
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.trigger = NULL,
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.set_fmt = NULL,
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};
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static struct snd_soc_dai_driver acp3x_i2s_dai_driver = {
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.playback = {
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
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SNDRV_PCM_FMTBIT_U8 |
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SNDRV_PCM_FMTBIT_S24_LE |
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SNDRV_PCM_FMTBIT_S32_LE,
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.channels_min = 2,
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.channels_max = 8,
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.rate_min = 8000,
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.rate_max = 96000,
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},
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.capture = {
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.rates = SNDRV_PCM_RATE_8000_48000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
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SNDRV_PCM_FMTBIT_U8 |
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SNDRV_PCM_FMTBIT_S24_LE |
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SNDRV_PCM_FMTBIT_S32_LE,
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.channels_min = 2,
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.channels_max = 2,
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.rate_min = 8000,
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.rate_max = 48000,
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},
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.ops = &acp3x_dai_i2s_ops,
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};
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static const struct snd_soc_component_driver acp3x_i2s_component = {
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.name = DRV_NAME,
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.ops = &acp3x_dma_ops,
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.pcm_new = acp3x_dma_new,
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};
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static int acp3x_audio_probe(struct platform_device *pdev)
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{
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int status;
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struct resource *res;
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struct i2s_dev_data *adata;
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unsigned int irqflags;
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if (!pdev->dev.platform_data) {
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dev_err(&pdev->dev, "platform_data not retrieved\n");
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return -ENODEV;
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}
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irqflags = *((unsigned int *)(pdev->dev.platform_data));
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adata = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dev_data),
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GFP_KERNEL);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(&pdev->dev, "IORESOURCE_IRQ FAILED\n");
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return -ENODEV;
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}
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adata->acp3x_base = devm_ioremap(&pdev->dev, res->start,
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resource_size(res));
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adata->play_stream = NULL;
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adata->capture_stream = NULL;
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dev_set_drvdata(&pdev->dev, adata);
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/* Initialize ACP */
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status = acp3x_init(adata->acp3x_base);
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if (status)
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return -ENODEV;
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status = devm_snd_soc_register_component(&pdev->dev,
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&acp3x_i2s_component,
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&acp3x_i2s_dai_driver, 1);
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if (status) {
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dev_err(&pdev->dev, "Fail to register acp i2s dai\n");
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goto dev_err;
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}
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return 0;
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dev_err:
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status = acp3x_deinit(adata->acp3x_base);
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if (status)
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dev_err(&pdev->dev, "ACP de-init failed\n");
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else
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dev_info(&pdev->dev, "ACP de-initialized\n");
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/*ignore device status and return driver probe error*/
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return -ENODEV;
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}
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static int acp3x_audio_remove(struct platform_device *pdev)
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{
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int ret;
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struct i2s_dev_data *adata = dev_get_drvdata(&pdev->dev);
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ret = acp3x_deinit(adata->acp3x_base);
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if (ret)
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dev_err(&pdev->dev, "ACP de-init failed\n");
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else
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dev_info(&pdev->dev, "ACP de-initialized\n");
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return 0;
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}
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static struct platform_driver acp3x_dma_driver = {
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.probe = acp3x_audio_probe,
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.remove = acp3x_audio_remove,
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.driver = {
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.name = "acp3x_rv_i2s",
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},
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};
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module_platform_driver(acp3x_dma_driver);
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MODULE_AUTHOR("Maruthi.Bayyavarapu@amd.com");
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MODULE_AUTHOR("Vijendar.Mukunda@amd.com");
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MODULE_DESCRIPTION("AMD ACP 3.x PCM Driver");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("platform:" DRV_NAME);

‎sound/soc/amd/raven/acp3x.h

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#define ACP3x_REG_START 0x1240000
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#define ACP3x_REG_END 0x1250200
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#define I2S_MODE 0x04
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#define BT_TX_THRESHOLD 26
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#define BT_RX_THRESHOLD 25
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#define ACP3x_POWER_ON 0x00
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#define ACP3x_POWER_ON_IN_PROGRESS 0x01
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#define ACP3x_POWER_OFF 0x02
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#define ACP3x_POWER_OFF_IN_PROGRESS 0x03
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#define ACP3x_SOFT_RESET__SoftResetAudDone_MASK 0x00010001
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static inline u32 rv_readl(void __iomem *base_addr)
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{

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