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torvaldstorvalds
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Merge tag 'drm-fixes-2019-02-08' of git://anongit.freedesktop.org/drm/drm
Pull drm fixes from Dave Airlie: "Missed fixes last week as had nothing until amdgpu showed up on Saturday. Other stuff has since rolled in along with some more amdgpu fixes, so we have two weeks of those, and some i915, vmwgfx, sun4i, rockchip and omap fixes. amdgpu/radeon: - fix crash on passthrough for SI - fencing fix for shared buffers - APU hwmon fix - API powerplay fix - eDP freesync fix - PASID mgr locking fix - KFD warning fix - DC/powerplay fix - raven revision ids fix - vega20 doorbell fix i915: - SNB display fix - SKL srckey mask fix - ICL DDI clock selection fix vmwgfx: - DMA API fix - IOMMU detection fix - display fixes sun4i: - tcon clock fix rockchip: - SPDX identifier fix omap: - DSI fixes" * tag 'drm-fixes-2019-02-08' of git://anongit.freedesktop.org/drm/drm: (28 commits) drm/omap: dsi: Hack-fix DSI bus flags drm/omap: dsi: Fix OF platform depopulate drm/omap: dsi: Fix crash in DSI debug dumps drm/i915: Try to sanitize bogus DPLL state left over by broken SNB BIOSen drm/amd/display: Attach VRR properties for eDP connectors drm/amdkfd: Fix if preprocessor statement above kfd_fill_iolink_info_for_cpu drm/amdgpu: use spin_lock_irqsave to protect vm_manager.pasid_idr drm/i915: always return something on DDI clock selection drm/i915: Fix skl srckey mask bits drm/vmwgfx: Improve on IOMMU detection drm/vmwgfx: Fix setting of dma masks drm/vmwgfx: Also check for crtc status while checking for DU active drm/vmwgfx: Fix an uninitialized fence handle value drm/vmwgfx: Return error code from vmw_execbuf_copy_fence_user drm/sun4i: tcon: Prepare and enable TCON channel 0 clock at init drm/amdgpu: fix the incorrect external id for raven series drm/amdgpu: Implement doorbell self-ring for NBIO 7.4 drm/amd/display: Fix fclk idle state drm/amdgpu: Transfer fences to dmabuf importer drm/amd/powerplay: Fix missing break in switch ...
2 parents 74e9671 + dada163 commit adcbc92

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22 files changed

+198
-110
lines changed

22 files changed

+198
-110
lines changed

‎drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1686,7 +1686,8 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj,
16861686
effective_mode &= ~S_IWUSR;
16871687

16881688
if ((adev->flags & AMD_IS_APU) &&
1689-
(attr == &sensor_dev_attr_power1_cap_max.dev_attr.attr ||
1689+
(attr == &sensor_dev_attr_power1_average.dev_attr.attr ||
1690+
attr == &sensor_dev_attr_power1_cap_max.dev_attr.attr ||
16901691
attr == &sensor_dev_attr_power1_cap_min.dev_attr.attr||
16911692
attr == &sensor_dev_attr_power1_cap.dev_attr.attr))
16921693
return 0;

‎drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c

Lines changed: 51 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -38,6 +38,7 @@
3838
#include "amdgpu_gem.h"
3939
#include <drm/amdgpu_drm.h>
4040
#include <linux/dma-buf.h>
41+
#include <linux/dma-fence-array.h>
4142

4243
/**
4344
* amdgpu_gem_prime_get_sg_table - &drm_driver.gem_prime_get_sg_table
@@ -187,6 +188,48 @@ amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
187188
return ERR_PTR(ret);
188189
}
189190

191+
static int
192+
__reservation_object_make_exclusive(struct reservation_object *obj)
193+
{
194+
struct dma_fence **fences;
195+
unsigned int count;
196+
int r;
197+
198+
if (!reservation_object_get_list(obj)) /* no shared fences to convert */
199+
return 0;
200+
201+
r = reservation_object_get_fences_rcu(obj, NULL, &count, &fences);
202+
if (r)
203+
return r;
204+
205+
if (count == 0) {
206+
/* Now that was unexpected. */
207+
} else if (count == 1) {
208+
reservation_object_add_excl_fence(obj, fences[0]);
209+
dma_fence_put(fences[0]);
210+
kfree(fences);
211+
} else {
212+
struct dma_fence_array *array;
213+
214+
array = dma_fence_array_create(count, fences,
215+
dma_fence_context_alloc(1), 0,
216+
false);
217+
if (!array)
218+
goto err_fences_put;
219+
220+
reservation_object_add_excl_fence(obj, &array->base);
221+
dma_fence_put(&array->base);
222+
}
223+
224+
return 0;
225+
226+
err_fences_put:
227+
while (count--)
228+
dma_fence_put(fences[count]);
229+
kfree(fences);
230+
return -ENOMEM;
231+
}
232+
190233
/**
191234
* amdgpu_gem_map_attach - &dma_buf_ops.attach implementation
192235
* @dma_buf: Shared DMA buffer
@@ -218,16 +261,16 @@ static int amdgpu_gem_map_attach(struct dma_buf *dma_buf,
218261

219262
if (attach->dev->driver != adev->dev->driver) {
220263
/*
221-
* Wait for all shared fences to complete before we switch to future
222-
* use of exclusive fence on this prime shared bo.
264+
* We only create shared fences for internal use, but importers
265+
* of the dmabuf rely on exclusive fences for implicitly
266+
* tracking write hazards. As any of the current fences may
267+
* correspond to a write, we need to convert all existing
268+
* fences on the reservation object into a single exclusive
269+
* fence.
223270
*/
224-
r = reservation_object_wait_timeout_rcu(bo->tbo.resv,
225-
true, false,
226-
MAX_SCHEDULE_TIMEOUT);
227-
if (unlikely(r < 0)) {
228-
DRM_DEBUG_PRIME("Fence wait failed: %li\n", r);
271+
r = __reservation_object_make_exclusive(bo->tbo.resv);
272+
if (r)
229273
goto error_unreserve;
230-
}
231274
}
232275

233276
/* pin buffer into GTT */

‎drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3363,14 +3363,15 @@ void amdgpu_vm_get_task_info(struct amdgpu_device *adev, unsigned int pasid,
33633363
struct amdgpu_task_info *task_info)
33643364
{
33653365
struct amdgpu_vm *vm;
3366+
unsigned long flags;
33663367

3367-
spin_lock(&adev->vm_manager.pasid_lock);
3368+
spin_lock_irqsave(&adev->vm_manager.pasid_lock, flags);
33683369

33693370
vm = idr_find(&adev->vm_manager.pasid_idr, pasid);
33703371
if (vm)
33713372
*task_info = vm->task_info;
33723373

3373-
spin_unlock(&adev->vm_manager.pasid_lock);
3374+
spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags);
33743375
}
33753376

33763377
/**

‎drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -93,7 +93,20 @@ static void nbio_v7_4_enable_doorbell_aperture(struct amdgpu_device *adev,
9393
static void nbio_v7_4_enable_doorbell_selfring_aperture(struct amdgpu_device *adev,
9494
bool enable)
9595
{
96+
u32 tmp = 0;
9697

98+
if (enable) {
99+
tmp = REG_SET_FIELD(tmp, DOORBELL_SELFRING_GPA_APER_CNTL, DOORBELL_SELFRING_GPA_APER_EN, 1) |
100+
REG_SET_FIELD(tmp, DOORBELL_SELFRING_GPA_APER_CNTL, DOORBELL_SELFRING_GPA_APER_MODE, 1) |
101+
REG_SET_FIELD(tmp, DOORBELL_SELFRING_GPA_APER_CNTL, DOORBELL_SELFRING_GPA_APER_SIZE, 0);
102+
103+
WREG32_SOC15(NBIO, 0, mmDOORBELL_SELFRING_GPA_APER_BASE_LOW,
104+
lower_32_bits(adev->doorbell.base));
105+
WREG32_SOC15(NBIO, 0, mmDOORBELL_SELFRING_GPA_APER_BASE_HIGH,
106+
upper_32_bits(adev->doorbell.base));
107+
}
108+
109+
WREG32_SOC15(NBIO, 0, mmDOORBELL_SELFRING_GPA_APER_CNTL, tmp);
97110
}
98111

99112
static void nbio_v7_4_ih_doorbell_range(struct amdgpu_device *adev,

‎drivers/gpu/drm/amd/amdgpu/soc15.c

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -729,11 +729,13 @@ static int soc15_common_early_init(void *handle)
729729
case CHIP_RAVEN:
730730
adev->asic_funcs = &soc15_asic_funcs;
731731
if (adev->rev_id >= 0x8)
732-
adev->external_rev_id = adev->rev_id + 0x81;
732+
adev->external_rev_id = adev->rev_id + 0x79;
733733
else if (adev->pdev->device == 0x15d8)
734734
adev->external_rev_id = adev->rev_id + 0x41;
735+
else if (adev->rev_id == 1)
736+
adev->external_rev_id = adev->rev_id + 0x20;
735737
else
736-
adev->external_rev_id = 0x1;
738+
adev->external_rev_id = adev->rev_id + 0x01;
737739

738740
if (adev->rev_id >= 0x8) {
739741
adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG |

‎drivers/gpu/drm/amd/amdkfd/kfd_crat.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -863,7 +863,7 @@ static int kfd_fill_mem_info_for_cpu(int numa_node_id, int *avail_size,
863863
return 0;
864864
}
865865

866-
#if CONFIG_X86_64
866+
#ifdef CONFIG_X86_64
867867
static int kfd_fill_iolink_info_for_cpu(int numa_node_id, int *avail_size,
868868
uint32_t *num_entries,
869869
struct crat_subtype_iolink *sub_type_hdr)

‎drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4082,7 +4082,8 @@ void amdgpu_dm_connector_init_helper(struct amdgpu_display_manager *dm,
40824082
}
40834083

40844084
if (connector_type == DRM_MODE_CONNECTOR_HDMIA ||
4085-
connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
4085+
connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
4086+
connector_type == DRM_MODE_CONNECTOR_eDP) {
40864087
drm_connector_attach_vrr_capable_property(
40874088
&aconnector->base);
40884089
}

‎drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -591,7 +591,15 @@ static void dce11_pplib_apply_display_requirements(
591591
dc,
592592
context->bw.dce.sclk_khz);
593593

594-
pp_display_cfg->min_dcfclock_khz = pp_display_cfg->min_engine_clock_khz;
594+
/*
595+
* As workaround for >4x4K lightup set dcfclock to min_engine_clock value.
596+
* This is not required for less than 5 displays,
597+
* thus don't request decfclk in dc to avoid impact
598+
* on power saving.
599+
*
600+
*/
601+
pp_display_cfg->min_dcfclock_khz = (context->stream_count > 4)?
602+
pp_display_cfg->min_engine_clock_khz : 0;
595603

596604
pp_display_cfg->min_engine_clock_deep_sleep_khz
597605
= context->bw.dce.sclk_deep_sleep_khz;

‎drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1033,6 +1033,7 @@ static int smu10_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr,
10331033
break;
10341034
case amd_pp_dpp_clock:
10351035
pclk_vol_table = pinfo->vdd_dep_on_dppclk;
1036+
break;
10361037
default:
10371038
return -EINVAL;
10381039
}

‎drivers/gpu/drm/drm_modes.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -758,7 +758,7 @@ int drm_mode_hsync(const struct drm_display_mode *mode)
758758
if (mode->hsync)
759759
return mode->hsync;
760760

761-
if (mode->htotal < 0)
761+
if (mode->htotal <= 0)
762762
return 0;
763763

764764
calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */

‎drivers/gpu/drm/i915/intel_ddi.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1086,7 +1086,7 @@ static uint32_t icl_pll_to_ddi_pll_sel(struct intel_encoder *encoder,
10861086
return DDI_CLK_SEL_TBT_810;
10871087
default:
10881088
MISSING_CASE(clock);
1089-
break;
1089+
return DDI_CLK_SEL_NONE;
10901090
}
10911091
case DPLL_ID_ICL_MGPLL1:
10921092
case DPLL_ID_ICL_MGPLL2:

‎drivers/gpu/drm/i915/intel_display.c

Lines changed: 44 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -15415,16 +15415,45 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc,
1541515415
}
1541615416
}
1541715417

15418+
static bool has_bogus_dpll_config(const struct intel_crtc_state *crtc_state)
15419+
{
15420+
struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
15421+
15422+
/*
15423+
* Some SNB BIOSen (eg. ASUS K53SV) are known to misprogram
15424+
* the hardware when a high res displays plugged in. DPLL P
15425+
* divider is zero, and the pipe timings are bonkers. We'll
15426+
* try to disable everything in that case.
15427+
*
15428+
* FIXME would be nice to be able to sanitize this state
15429+
* without several WARNs, but for now let's take the easy
15430+
* road.
15431+
*/
15432+
return IS_GEN6(dev_priv) &&
15433+
crtc_state->base.active &&
15434+
crtc_state->shared_dpll &&
15435+
crtc_state->port_clock == 0;
15436+
}
15437+
1541815438
static void intel_sanitize_encoder(struct intel_encoder *encoder)
1541915439
{
1542015440
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1542115441
struct intel_connector *connector;
15442+
struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
15443+
struct intel_crtc_state *crtc_state = crtc ?
15444+
to_intel_crtc_state(crtc->base.state) : NULL;
1542215445

1542315446
/* We need to check both for a crtc link (meaning that the
1542415447
* encoder is active and trying to read from a pipe) and the
1542515448
* pipe itself being active. */
15426-
bool has_active_crtc = encoder->base.crtc &&
15427-
to_intel_crtc(encoder->base.crtc)->active;
15449+
bool has_active_crtc = crtc_state &&
15450+
crtc_state->base.active;
15451+
15452+
if (crtc_state && has_bogus_dpll_config(crtc_state)) {
15453+
DRM_DEBUG_KMS("BIOS has misprogrammed the hardware. Disabling pipe %c\n",
15454+
pipe_name(crtc->pipe));
15455+
has_active_crtc = false;
15456+
}
1542815457

1542915458
connector = intel_encoder_find_connector(encoder);
1543015459
if (connector && !has_active_crtc) {
@@ -15435,16 +15464,25 @@ static void intel_sanitize_encoder(struct intel_encoder *encoder)
1543515464
/* Connector is active, but has no active pipe. This is
1543615465
* fallout from our resume register restoring. Disable
1543715466
* the encoder manually again. */
15438-
if (encoder->base.crtc) {
15439-
struct drm_crtc_state *crtc_state = encoder->base.crtc->state;
15467+
if (crtc_state) {
15468+
struct drm_encoder *best_encoder;
1544015469

1544115470
DRM_DEBUG_KMS("[ENCODER:%d:%s] manually disabled\n",
1544215471
encoder->base.base.id,
1544315472
encoder->base.name);
15473+
15474+
/* avoid oopsing in case the hooks consult best_encoder */
15475+
best_encoder = connector->base.state->best_encoder;
15476+
connector->base.state->best_encoder = &encoder->base;
15477+
1544415478
if (encoder->disable)
15445-
encoder->disable(encoder, to_intel_crtc_state(crtc_state), connector->base.state);
15479+
encoder->disable(encoder, crtc_state,
15480+
connector->base.state);
1544615481
if (encoder->post_disable)
15447-
encoder->post_disable(encoder, to_intel_crtc_state(crtc_state), connector->base.state);
15482+
encoder->post_disable(encoder, crtc_state,
15483+
connector->base.state);
15484+
15485+
connector->base.state->best_encoder = best_encoder;
1544815486
}
1544915487
encoder->base.crtc = NULL;
1545015488

‎drivers/gpu/drm/i915/intel_sprite.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -494,7 +494,7 @@ skl_program_plane(struct intel_plane *plane,
494494

495495
keymax = (key->max_value & 0xffffff) | PLANE_KEYMAX_ALPHA(alpha);
496496

497-
keymsk = key->channel_mask & 0x3ffffff;
497+
keymsk = key->channel_mask & 0x7ffffff;
498498
if (alpha < 0xff)
499499
keymsk |= PLANE_KEYMSK_ALPHA_ENABLE;
500500

‎drivers/gpu/drm/omapdrm/dss/dsi.c

Lines changed: 19 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1406,7 +1406,7 @@ static void dsi_pll_disable(struct dss_pll *pll)
14061406

14071407
static int dsi_dump_dsi_clocks(struct seq_file *s, void *p)
14081408
{
1409-
struct dsi_data *dsi = p;
1409+
struct dsi_data *dsi = s->private;
14101410
struct dss_pll_clock_info *cinfo = &dsi->pll.cinfo;
14111411
enum dss_clk_source dispc_clk_src, dsi_clk_src;
14121412
int dsi_module = dsi->module_id;
@@ -1467,7 +1467,7 @@ static int dsi_dump_dsi_clocks(struct seq_file *s, void *p)
14671467
#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
14681468
static int dsi_dump_dsi_irqs(struct seq_file *s, void *p)
14691469
{
1470-
struct dsi_data *dsi = p;
1470+
struct dsi_data *dsi = s->private;
14711471
unsigned long flags;
14721472
struct dsi_irq_stats stats;
14731473

@@ -1558,7 +1558,7 @@ static int dsi_dump_dsi_irqs(struct seq_file *s, void *p)
15581558

15591559
static int dsi_dump_dsi_regs(struct seq_file *s, void *p)
15601560
{
1561-
struct dsi_data *dsi = p;
1561+
struct dsi_data *dsi = s->private;
15621562

15631563
if (dsi_runtime_get(dsi))
15641564
return 0;
@@ -4751,6 +4751,17 @@ static int dsi_set_config(struct omap_dss_device *dssdev,
47514751
dsi->vm.flags |= DISPLAY_FLAGS_HSYNC_HIGH;
47524752
dsi->vm.flags &= ~DISPLAY_FLAGS_VSYNC_LOW;
47534753
dsi->vm.flags |= DISPLAY_FLAGS_VSYNC_HIGH;
4754+
/*
4755+
* HACK: These flags should be handled through the omap_dss_device bus
4756+
* flags, but this will only be possible when the DSI encoder will be
4757+
* converted to the omapdrm-managed encoder model.
4758+
*/
4759+
dsi->vm.flags &= ~DISPLAY_FLAGS_PIXDATA_NEGEDGE;
4760+
dsi->vm.flags |= DISPLAY_FLAGS_PIXDATA_POSEDGE;
4761+
dsi->vm.flags &= ~DISPLAY_FLAGS_DE_LOW;
4762+
dsi->vm.flags |= DISPLAY_FLAGS_DE_HIGH;
4763+
dsi->vm.flags &= ~DISPLAY_FLAGS_SYNC_POSEDGE;
4764+
dsi->vm.flags |= DISPLAY_FLAGS_SYNC_NEGEDGE;
47544765

47554766
dss_mgr_set_timings(&dsi->output, &dsi->vm);
47564767

@@ -5083,15 +5094,15 @@ static int dsi_bind(struct device *dev, struct device *master, void *data)
50835094

50845095
snprintf(name, sizeof(name), "dsi%u_regs", dsi->module_id + 1);
50855096
dsi->debugfs.regs = dss_debugfs_create_file(dss, name,
5086-
dsi_dump_dsi_regs, &dsi);
5097+
dsi_dump_dsi_regs, dsi);
50875098
#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
50885099
snprintf(name, sizeof(name), "dsi%u_irqs", dsi->module_id + 1);
50895100
dsi->debugfs.irqs = dss_debugfs_create_file(dss, name,
5090-
dsi_dump_dsi_irqs, &dsi);
5101+
dsi_dump_dsi_irqs, dsi);
50915102
#endif
50925103
snprintf(name, sizeof(name), "dsi%u_clks", dsi->module_id + 1);
50935104
dsi->debugfs.clks = dss_debugfs_create_file(dss, name,
5094-
dsi_dump_dsi_clocks, &dsi);
5105+
dsi_dump_dsi_clocks, dsi);
50955106

50965107
return 0;
50975108
}
@@ -5104,8 +5115,6 @@ static void dsi_unbind(struct device *dev, struct device *master, void *data)
51045115
dss_debugfs_remove_file(dsi->debugfs.irqs);
51055116
dss_debugfs_remove_file(dsi->debugfs.regs);
51065117

5107-
of_platform_depopulate(dev);
5108-
51095118
WARN_ON(dsi->scp_clk_refcount > 0);
51105119

51115120
dss_pll_unregister(&dsi->pll);
@@ -5457,6 +5466,8 @@ static int dsi_remove(struct platform_device *pdev)
54575466

54585467
dsi_uninit_output(dsi);
54595468

5469+
of_platform_depopulate(&pdev->dev);
5470+
54605471
pm_runtime_disable(&pdev->dev);
54615472

54625473
if (dsi->vdds_dsi_reg != NULL && dsi->vdds_dsi_enabled) {

‎drivers/gpu/drm/radeon/ci_dpm.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5676,7 +5676,7 @@ int ci_dpm_init(struct radeon_device *rdev)
56765676
u16 data_offset, size;
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u8 frev, crev;
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struct ci_power_info *pi;
5679-
enum pci_bus_speed speed_cap;
5679+
enum pci_bus_speed speed_cap = PCI_SPEED_UNKNOWN;
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struct pci_dev *root = rdev->pdev->bus->self;
56815681
int ret;
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@@ -5685,7 +5685,8 @@ int ci_dpm_init(struct radeon_device *rdev)
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return -ENOMEM;
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rdev->pm.dpm.priv = pi;
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5688-
speed_cap = pcie_get_speed_cap(root);
5688+
if (!pci_is_root_bus(rdev->pdev->bus))
5689+
speed_cap = pcie_get_speed_cap(root);
56895690
if (speed_cap == PCI_SPEED_UNKNOWN) {
56905691
pi->sys_pcie_mask = 0;
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} else {

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