drm/i915: Sink rate read should be saved in deca-kHz

Sonika Jindal · jnikula · commit af77b9741300 · 2015-05-07T11:57:00.000+03:00
The sink rate read from supported link rate table is in KHz as per spec while in drm, the saved clock is in deca-KHz. So divide the link rate by 10 before storing. Reading of rates was added by: commit fc0f8e2 ("drm/i915/skl: Read sink supported rates from edp panel") Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Sonika Jindal <sonika.jindal@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
@@ -3812,7 +3812,8 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
 			if (val == 0)
 				break;
 
-			intel_dp->sink_rates[i] = val * 200;
+			/* Value read is in kHz while drm clock is saved in deca-kHz */
+			intel_dp->sink_rates[i] = (val * 200) / 10;
 		}
 		intel_dp->num_sink_rates = i;
 	}

Original file line number	Diff line number	Diff line change
`@@ -3812,7 +3812,8 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)`
`3812`	`3812`	`if (val == 0)`
`3813`	`3813`	`break;`
`3814`	`3814`
`3815`		`- intel_dp->sink_rates[i] = val * 200;`
	`3815`	`+ /* Value read is in kHz while drm clock is saved in deca-kHz */`
	`3816`	`+ intel_dp->sink_rates[i] = (val * 200) / 10;`
`3816`	`3817`	`}`
`3817`	`3818`	`intel_dp->num_sink_rates = i;`
`3818`	`3819`	`}`