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arm64: cpufeature: treat unknown fields as RES0
Any fields not defined in an arm64_ftr_bits entry are propagated to the system-wide register value in init_cpu_ftr_reg(), and while we require that these strictly match for the sanity checks, we don't update them in update_cpu_ftr_reg(). Generally, the lack of an arm64_ftr_bits entry indicates that the bits are currently RES0 (as is the case for the upper 32 bits of all supposedly 32-bit registers). A better default would be to use zero for the system-wide value of unallocated bits, making all register checking consistent, and allowing for subsequent simplifications to the arm64_ftr_bits arrays. This patch updates init_cpu_ftr_reg() to treat unallocated bits as RES0 for the purpose of the system-wide safe value. These bits will still be sanity checked with strict match requirements, as is currently the case. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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arch/arm64/kernel/cpufeature.c

Lines changed: 11 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -415,23 +415,33 @@ static void __init sort_ftr_regs(void)
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/*
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* Initialise the CPU feature register from Boot CPU values.
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* Also initiliases the strict_mask for the register.
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* Any bits that are not covered by an arm64_ftr_bits entry are considered
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* RES0 for the system-wide value, and must strictly match.
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*/
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static void __init init_cpu_ftr_reg(u32 sys_reg, u64 new)
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{
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u64 val = 0;
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u64 strict_mask = ~0x0ULL;
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u64 valid_mask = 0;
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const struct arm64_ftr_bits *ftrp;
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struct arm64_ftr_reg *reg = get_arm64_ftr_reg(sys_reg);
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BUG_ON(!reg);
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for (ftrp = reg->ftr_bits; ftrp->width; ftrp++) {
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u64 ftr_mask = arm64_ftr_mask(ftrp);
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s64 ftr_new = arm64_ftr_value(ftrp, new);
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val = arm64_ftr_set_value(ftrp, val, ftr_new);
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valid_mask |= ftr_mask;
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if (!ftrp->strict)
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strict_mask &= ~arm64_ftr_mask(ftrp);
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strict_mask &= ~ftr_mask;
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}
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val &= valid_mask;
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reg->sys_val = val;
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reg->strict_mask = strict_mask;
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}

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