@@ -965,6 +965,11 @@ mvpp2_shared_interrupt_mask_unmask(struct mvpp2_port *port, bool mask)
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}
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/* Port configuration routines */
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+ static bool mvpp2_is_xlg (phy_interface_t interface )
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+ {
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+ return interface == PHY_INTERFACE_MODE_10GKR ||
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+ interface == PHY_INTERFACE_MODE_XAUI ;
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+ }
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static void mvpp22_gop_init_rgmii (struct mvpp2_port * port )
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{
@@ -1181,9 +1186,7 @@ static void mvpp2_port_enable(struct mvpp2_port *port)
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u32 val ;
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/* Only GOP port 0 has an XLG MAC */
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- if (port -> gop_id == 0 &&
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- (port -> phy_interface == PHY_INTERFACE_MODE_XAUI ||
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- port -> phy_interface == PHY_INTERFACE_MODE_10GKR )) {
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+ if (port -> gop_id == 0 && mvpp2_is_xlg (port -> phy_interface )) {
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val = readl (port -> base + MVPP22_XLG_CTRL0_REG );
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val |= MVPP22_XLG_CTRL0_PORT_EN |
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MVPP22_XLG_CTRL0_MAC_RESET_DIS ;
@@ -1202,9 +1205,7 @@ static void mvpp2_port_disable(struct mvpp2_port *port)
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u32 val ;
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/* Only GOP port 0 has an XLG MAC */
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- if (port -> gop_id == 0 &&
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- (port -> phy_interface == PHY_INTERFACE_MODE_XAUI ||
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- port -> phy_interface == PHY_INTERFACE_MODE_10GKR )) {
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+ if (port -> gop_id == 0 && mvpp2_is_xlg (port -> phy_interface )) {
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val = readl (port -> base + MVPP22_XLG_CTRL0_REG );
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val &= ~MVPP22_XLG_CTRL0_PORT_EN ;
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writel (val , port -> base + MVPP22_XLG_CTRL0_REG );
@@ -3146,18 +3147,15 @@ static void mvpp22_mode_reconfigure(struct mvpp2_port *port)
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ctrl3 = readl (port -> base + MVPP22_XLG_CTRL3_REG );
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ctrl3 &= ~MVPP22_XLG_CTRL3_MACMODESELECT_MASK ;
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- if (port -> phy_interface == PHY_INTERFACE_MODE_XAUI ||
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- port -> phy_interface == PHY_INTERFACE_MODE_10GKR )
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+ if (mvpp2_is_xlg (port -> phy_interface ))
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ctrl3 |= MVPP22_XLG_CTRL3_MACMODESELECT_10G ;
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else
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ctrl3 |= MVPP22_XLG_CTRL3_MACMODESELECT_GMAC ;
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writel (ctrl3 , port -> base + MVPP22_XLG_CTRL3_REG );
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}
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- if (port -> gop_id == 0 &&
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- (port -> phy_interface == PHY_INTERFACE_MODE_XAUI ||
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- port -> phy_interface == PHY_INTERFACE_MODE_10GKR ))
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+ if (port -> gop_id == 0 && mvpp2_is_xlg (port -> phy_interface ))
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mvpp2_xlg_max_rx_size_set (port );
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else
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mvpp2_gmac_max_rx_size_set (port );
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