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39 | 39 | #define MAX_VOLTAGE_1_8 1980000
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40 | 40 | #define MAX_VOLTAGE_3_3 3600000
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41 | 41 |
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| 42 | +#define PX30_IO_VSEL 0x180 |
| 43 | +#define PX30_IO_VSEL_VCCIO6_SRC BIT(0) |
| 44 | +#define PX30_IO_VSEL_VCCIO6_SUPPLY_NUM 1 |
| 45 | + |
42 | 46 | #define RK3288_SOC_CON2 0x24c
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43 | 47 | #define RK3288_SOC_CON2_FLASH0 BIT(7)
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44 | 48 | #define RK3288_SOC_FLASH_SUPPLY_NUM 2
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@@ -151,6 +155,25 @@ static int rockchip_iodomain_notify(struct notifier_block *nb,
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151 | 155 | return NOTIFY_OK;
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152 | 156 | }
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153 | 157 |
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| 158 | +static void px30_iodomain_init(struct rockchip_iodomain *iod) |
| 159 | +{ |
| 160 | + int ret; |
| 161 | + u32 val; |
| 162 | + |
| 163 | + /* if no VCCIO0 supply we should leave things alone */ |
| 164 | + if (!iod->supplies[PX30_IO_VSEL_VCCIO6_SUPPLY_NUM].reg) |
| 165 | + return; |
| 166 | + |
| 167 | + /* |
| 168 | + * set vccio0 iodomain to also use this framework |
| 169 | + * instead of a special gpio. |
| 170 | + */ |
| 171 | + val = PX30_IO_VSEL_VCCIO6_SRC | (PX30_IO_VSEL_VCCIO6_SRC << 16); |
| 172 | + ret = regmap_write(iod->grf, PX30_IO_VSEL, val); |
| 173 | + if (ret < 0) |
| 174 | + dev_warn(iod->dev, "couldn't update vccio0 ctrl\n"); |
| 175 | +} |
| 176 | + |
154 | 177 | static void rk3288_iodomain_init(struct rockchip_iodomain *iod)
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155 | 178 | {
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156 | 179 | int ret;
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@@ -227,6 +250,43 @@ static void rk3399_pmu_iodomain_init(struct rockchip_iodomain *iod)
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227 | 250 | dev_warn(iod->dev, "couldn't update pmu io iodomain ctrl\n");
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228 | 251 | }
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229 | 252 |
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| 253 | +static const struct rockchip_iodomain_soc_data soc_data_px30 = { |
| 254 | + .grf_offset = 0x180, |
| 255 | + .supply_names = { |
| 256 | + NULL, |
| 257 | + "vccio6", |
| 258 | + "vccio1", |
| 259 | + "vccio2", |
| 260 | + "vccio3", |
| 261 | + "vccio4", |
| 262 | + "vccio5", |
| 263 | + "vccio-oscgpi", |
| 264 | + }, |
| 265 | + .init = px30_iodomain_init, |
| 266 | +}; |
| 267 | + |
| 268 | +static const struct rockchip_iodomain_soc_data soc_data_px30_pmu = { |
| 269 | + .grf_offset = 0x100, |
| 270 | + .supply_names = { |
| 271 | + NULL, |
| 272 | + NULL, |
| 273 | + NULL, |
| 274 | + NULL, |
| 275 | + NULL, |
| 276 | + NULL, |
| 277 | + NULL, |
| 278 | + NULL, |
| 279 | + NULL, |
| 280 | + NULL, |
| 281 | + NULL, |
| 282 | + NULL, |
| 283 | + NULL, |
| 284 | + NULL, |
| 285 | + "pmuio1", |
| 286 | + "pmuio2", |
| 287 | + }, |
| 288 | +}; |
| 289 | + |
230 | 290 | /*
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231 | 291 | * On the rk3188 the io-domains are handled by a shared register with the
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232 | 292 | * lower 8 bits being still being continuing drive-strength settings.
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@@ -380,6 +440,14 @@ static const struct rockchip_iodomain_soc_data soc_data_rv1108_pmu = {
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380 | 440 | };
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381 | 441 |
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382 | 442 | static const struct of_device_id rockchip_iodomain_match[] = {
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| 443 | + { |
| 444 | + .compatible = "rockchip,px30-io-voltage-domain", |
| 445 | + .data = (void *)&soc_data_px30 |
| 446 | + }, |
| 447 | + { |
| 448 | + .compatible = "rockchip,px30-pmu-io-voltage-domain", |
| 449 | + .data = (void *)&soc_data_px30_pmu |
| 450 | + }, |
383 | 451 | {
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384 | 452 | .compatible = "rockchip,rk3188-io-voltage-domain",
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385 | 453 | .data = &soc_data_rk3188
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