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Sergei Shtylyovhorms
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arm64: dts: renesas: initial Condor board device tree
Add the initial device tree for the R8A77980 SoC based Condor board. The board has 1 debug serial port (SCIF0); include support for it, so that the serial console can work. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> [simon: correct memory size to 0x78000000 (2GiB)] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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arch/arm64/boot/dts/renesas/Makefile

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@@ -8,4 +8,5 @@ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb
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dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb
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dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb
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dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb r8a77970-v3msk.dtb
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dtb-$(CONFIG_ARCH_R8A77980) += r8a77980-condor.dtb
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dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the Condor board
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*
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* Copyright (C) 2018 Renesas Electronics Corp.
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* Copyright (C) 2018 Cogent Embedded, Inc.
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*/
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/dts-v1/;
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#include "r8a77980.dtsi"
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/ {
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model = "Renesas Condor board based on r8a77980";
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compatible = "renesas,condor", "renesas,r8a77980";
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aliases {
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serial0 = &scif0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@48000000 {
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device_type = "memory";
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/* first 128MB is reserved for secure area. */
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reg = <0 0x48000000 0 0x78000000>;
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};
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};
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&extal_clk {
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clock-frequency = <16666666>;
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};
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&extalr_clk {
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clock-frequency = <32768>;
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};
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&scif0 {
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status = "okay";
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};
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&scif_clk {
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clock-frequency = <14745600>;
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};

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