drm/bridge/sii8620: add MHL3 mode check helper

Andrzej Hajda · boddob · commit bb4954c77c25 · 2017-02-02T15:15:22.000+05:30
MHL3 modes differs significantly from MHL1 mode, this helper will be used frequently to clearly distinguish them. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Archit Taneja <architt@codeaurora.org> Link: http://patchwork.freedesktop.org/patch/msgid/1485935272-17337-3-git-send-email-a.hajda@samsung.com
diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c b/drivers/gpu/drm/bridge/sil-sii8620.c
@@ -227,6 +227,11 @@ static void sii8620_setbits(struct sii8620 *ctx, u16 addr, u8 mask, u8 val)
 	sii8620_write(ctx, addr, val);
 }
 
+static inline bool sii8620_is_mhl3(struct sii8620 *ctx)
+{
+	return ctx->mode >= CM_MHL3;
+}
+
 static void sii8620_mt_cleanup(struct sii8620 *ctx)
 {
 	struct sii8620_mt_msg *msg, *n;
@@ -724,7 +729,7 @@ static void sii8620_start_hdmi(struct sii8620 *ctx)
 
 static void sii8620_start_video(struct sii8620 *ctx)
 {
-	if (ctx->mode < CM_MHL3)
+	if (!sii8620_is_mhl3(ctx))
 		sii8620_stop_video(ctx);
 
 	switch (ctx->sink_type) {
@@ -838,7 +843,7 @@ static void sii8620_mhl_discover(struct sii8620 *ctx)
 
 static void sii8620_peer_specific_init(struct sii8620 *ctx)
 {
-	if (ctx->mode == CM_MHL3)
+	if (sii8620_is_mhl3(ctx))
 		sii8620_write_seq_static(ctx,
 			REG_SYS_CTRL1, BIT_SYS_CTRL1_BLOCK_DDC_BY_HPD,
 			REG_EMSCINTRMASK1,

Original file line number	Diff line number	Diff line change
`@@ -227,6 +227,11 @@ static void sii8620_setbits(struct sii8620 *ctx, u16 addr, u8 mask, u8 val)`
`227`	`227`	`sii8620_write(ctx, addr, val);`
`228`	`228`	`}`
`229`	`229`
	`230`	`+static inline bool sii8620_is_mhl3(struct sii8620 *ctx)`
	`231`	`+{`
	`232`	`+ return ctx->mode >= CM_MHL3;`
	`233`	`+}`
	`234`	`+`
`230`	`235`	`static void sii8620_mt_cleanup(struct sii8620 *ctx)`
`231`	`236`	`{`
`232`	`237`	`struct sii8620_mt_msg msg, n;`
`@@ -724,7 +729,7 @@ static void sii8620_start_hdmi(struct sii8620 *ctx)`
`724`	`729`
`725`	`730`	`static void sii8620_start_video(struct sii8620 *ctx)`
`726`	`731`	`{`
`727`		`- if (ctx->mode < CM_MHL3)`
	`732`	`+ if (!sii8620_is_mhl3(ctx))`
`728`	`733`	`sii8620_stop_video(ctx);`
`729`	`734`
`730`	`735`	`switch (ctx->sink_type) {`
`@@ -838,7 +843,7 @@ static void sii8620_mhl_discover(struct sii8620 *ctx)`
`838`	`843`
`839`	`844`	`static void sii8620_peer_specific_init(struct sii8620 *ctx)`
`840`	`845`	`{`
`841`		`- if (ctx->mode == CM_MHL3)`
	`846`	`+ if (sii8620_is_mhl3(ctx))`
`842`	`847`	`sii8620_write_seq_static(ctx,`
`843`	`848`	`REG_SYS_CTRL1, BIT_SYS_CTRL1_BLOCK_DDC_BY_HPD,`
`844`	`849`	`REG_EMSCINTRMASK1,`