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Julien Thierryctmarinas
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arm64: Enable the support of pseudo-NMIs
Add a build option and a command line parameter to build and enable the support of pseudo-NMIs. Signed-off-by: Julien Thierry <julien.thierry@arm.com> Suggested-by: Daniel Thompson <daniel.thompson@linaro.org> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Documentation/admin-guide/kernel-parameters.txt

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@@ -1831,6 +1831,11 @@
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to let secondary kernels in charge of setting up
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LPIs.
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irqchip.gicv3_pseudo_nmi= [ARM64]
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Enables support for pseudo-NMIs in the kernel. This
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requires the kernel to be built with
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CONFIG_ARM64_PSEUDO_NMI.
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irqfixup [HW]
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When an interrupt is not handled search all handlers
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for it. Intended to get systems with badly broken

arch/arm64/Kconfig

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@@ -1327,6 +1327,20 @@ config ARM64_MODULE_PLTS
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bool
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select HAVE_MOD_ARCH_SPECIFIC
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config ARM64_PSEUDO_NMI
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bool "Support for NMI-like interrupts"
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select CONFIG_ARM_GIC_V3
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help
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Adds support for mimicking Non-Maskable Interrupts through the use of
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GIC interrupt priority. This support requires version 3 or later of
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Arm GIC.
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This high priority configuration for interrupts needs to be
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explicitly enabled by setting the kernel parameter
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"irqchip.gicv3_pseudo_nmi" to 1.
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If unsure, say N
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config RELOCATABLE
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bool
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help

arch/arm64/kernel/cpufeature.c

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@@ -1207,10 +1207,18 @@ static void cpu_enable_address_auth(struct arm64_cpu_capabilities const *cap)
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#endif /* CONFIG_ARM64_PTR_AUTH */
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#ifdef CONFIG_ARM64_PSEUDO_NMI
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static bool enable_pseudo_nmi;
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static int __init early_enable_pseudo_nmi(char *p)
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{
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return strtobool(p, &enable_pseudo_nmi);
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}
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early_param("irqchip.gicv3_pseudo_nmi", early_enable_pseudo_nmi);
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static bool can_use_gic_priorities(const struct arm64_cpu_capabilities *entry,
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int scope)
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{
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return false;
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return enable_pseudo_nmi && has_useable_gicv3_cpuif(entry, scope);
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}
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#endif
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