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Steven J. Hillralfbaechle
Steven J. Hill
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ralfbaechle
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MIPS: Rearrange PTE bits into fixed positions.
This patch rearranges the PTE bits into fixed positions for R2 and later cores. In the past, the TLB handling code did runtime checking of RI/XI and adjusted the shifts and rotates in order to fit the largest PFN value into the PTE. The checking now occurs when building the TLB handler, thus eliminating those checks. These new arrangements also define the largest possible PFN value that can fit in the PTE. HUGE page support is only available for 64-bit cores. Layouts of the PTE bits are now: 64-bit, R1 or earlier: CCC D V G [S H] M A W R P 32-bit, R1 or earler: CCC D V G M A W R P 64-bit, R2 or later: CCC D V G RI/R XI [S H] M A W P 32-bit, R2 or later: CCC D V G RI/R XI M A W P [ralf@linux-mips.org: Fix another build error *rant* *rant*] Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9353/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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‎arch/mips/include/asm/pgtable-bits.h

Lines changed: 55 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -95,50 +95,67 @@
9595

9696
#else
9797
/*
98-
* When using the RI/XI bit support, we have 13 bits of flags below
99-
* the physical address. The RI/XI bits are placed such that a SRL 5
100-
* can strip off the software bits, then a ROTR 2 can move the RI/XI
101-
* into bits [63:62]. This also limits physical address to 56 bits,
102-
* which is more than we need right now.
98+
* Below are the "Normal" R4K cases
10399
*/
104100

105101
/*
106102
* The following bits are implemented in software
107103
*/
108104
#define _PAGE_PRESENT_SHIFT 0
109105
#define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT)
110-
#define _PAGE_READ_SHIFT (cpu_has_rixi ? _PAGE_PRESENT_SHIFT : _PAGE_PRESENT_SHIFT + 1)
111-
#define _PAGE_READ ({BUG_ON(cpu_has_rixi); 1 << _PAGE_READ_SHIFT; })
106+
/* R2 or later cores check for RI/XI support to determine _PAGE_READ */
107+
#ifdef CONFIG_CPU_MIPSR2
108+
#define _PAGE_WRITE_SHIFT (_PAGE_PRESENT_SHIFT + 1)
109+
#define _PAGE_WRITE (1 << _PAGE_WRITE_SHIFT)
110+
#else
111+
#define _PAGE_READ_SHIFT (_PAGE_PRESENT_SHIFT + 1)
112+
#define _PAGE_READ (1 << _PAGE_READ_SHIFT)
112113
#define _PAGE_WRITE_SHIFT (_PAGE_READ_SHIFT + 1)
113114
#define _PAGE_WRITE (1 << _PAGE_WRITE_SHIFT)
115+
#endif
114116
#define _PAGE_ACCESSED_SHIFT (_PAGE_WRITE_SHIFT + 1)
115117
#define _PAGE_ACCESSED (1 << _PAGE_ACCESSED_SHIFT)
116118
#define _PAGE_MODIFIED_SHIFT (_PAGE_ACCESSED_SHIFT + 1)
117119
#define _PAGE_MODIFIED (1 << _PAGE_MODIFIED_SHIFT)
118120

119-
#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
120-
/* huge tlb page */
121+
#if defined(CONFIG_64BIT) && defined(CONFIG_MIPS_HUGE_TLB_SUPPORT)
122+
/* Huge TLB page */
121123
#define _PAGE_HUGE_SHIFT (_PAGE_MODIFIED_SHIFT + 1)
122124
#define _PAGE_HUGE (1 << _PAGE_HUGE_SHIFT)
123125
#define _PAGE_SPLITTING_SHIFT (_PAGE_HUGE_SHIFT + 1)
124126
#define _PAGE_SPLITTING (1 << _PAGE_SPLITTING_SHIFT)
127+
128+
/* Only R2 or newer cores have the XI bit */
129+
#ifdef CONFIG_CPU_MIPSR2
130+
#define _PAGE_NO_EXEC_SHIFT (_PAGE_SPLITTING_SHIFT + 1)
125131
#else
126-
#define _PAGE_HUGE_SHIFT (_PAGE_MODIFIED_SHIFT)
127-
#define _PAGE_HUGE ({BUG(); 1; }) /* Dummy value */
128-
#define _PAGE_SPLITTING_SHIFT (_PAGE_HUGE_SHIFT)
129-
#define _PAGE_SPLITTING ({BUG(); 1; }) /* Dummy value */
130-
#endif
132+
#define _PAGE_GLOBAL_SHIFT (_PAGE_SPLITTING_SHIFT + 1)
133+
#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
134+
#endif /* CONFIG_CPU_MIPSR2 */
135+
136+
#endif /* CONFIG_64BIT && CONFIG_MIPS_HUGE_TLB_SUPPORT */
131137

132-
/* Page cannot be executed */
133-
#define _PAGE_NO_EXEC_SHIFT (cpu_has_rixi ? _PAGE_SPLITTING_SHIFT + 1 : _PAGE_SPLITTING_SHIFT)
134-
#define _PAGE_NO_EXEC ({BUG_ON(!cpu_has_rixi); 1 << _PAGE_NO_EXEC_SHIFT; })
138+
#ifdef CONFIG_CPU_MIPSR2
139+
/* XI - page cannot be executed */
140+
#ifndef _PAGE_NO_EXEC_SHIFT
141+
#define _PAGE_NO_EXEC_SHIFT (_PAGE_MODIFIED_SHIFT + 1)
142+
#endif
143+
#define _PAGE_NO_EXEC (cpu_has_rixi ? (1 << _PAGE_NO_EXEC_SHIFT) : 0)
135144

136-
/* Page cannot be read */
137-
#define _PAGE_NO_READ_SHIFT (cpu_has_rixi ? _PAGE_NO_EXEC_SHIFT + 1 : _PAGE_NO_EXEC_SHIFT)
138-
#define _PAGE_NO_READ ({BUG_ON(!cpu_has_rixi); 1 << _PAGE_NO_READ_SHIFT; })
145+
/* RI - page cannot be read */
146+
#define _PAGE_READ_SHIFT (_PAGE_NO_EXEC_SHIFT + 1)
147+
#define _PAGE_READ (cpu_has_rixi ? 0 : (1 << _PAGE_READ_SHIFT))
148+
#define _PAGE_NO_READ_SHIFT _PAGE_READ_SHIFT
149+
#define _PAGE_NO_READ (cpu_has_rixi ? (1 << _PAGE_READ_SHIFT) : 0)
139150

140151
#define _PAGE_GLOBAL_SHIFT (_PAGE_NO_READ_SHIFT + 1)
141152
#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
153+
154+
#else /* !CONFIG_CPU_MIPSR2 */
155+
#define _PAGE_GLOBAL_SHIFT (_PAGE_MODIFIED_SHIFT + 1)
156+
#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
157+
#endif /* CONFIG_CPU_MIPSR2 */
158+
142159
#define _PAGE_VALID_SHIFT (_PAGE_GLOBAL_SHIFT + 1)
143160
#define _PAGE_VALID (1 << _PAGE_VALID_SHIFT)
144161
#define _PAGE_DIRTY_SHIFT (_PAGE_VALID_SHIFT + 1)
@@ -150,18 +167,26 @@
150167

151168
#endif /* defined(CONFIG_PHYS_ADDR_T_64BIT && defined(CONFIG_CPU_MIPS32) */
152169

170+
#ifndef _PAGE_NO_EXEC
171+
#define _PAGE_NO_EXEC 0
172+
#endif
173+
#ifndef _PAGE_NO_READ
174+
#define _PAGE_NO_READ 0
175+
#endif
176+
153177
#define _PAGE_SILENT_READ _PAGE_VALID
154178
#define _PAGE_SILENT_WRITE _PAGE_DIRTY
155179

156180
#define _PFN_MASK (~((1 << (_PFN_SHIFT)) - 1))
157181

158-
#ifndef _PAGE_NO_READ
159-
#define _PAGE_NO_READ ({BUG(); 0; })
160-
#define _PAGE_NO_READ_SHIFT ({BUG(); 0; })
161-
#endif
162-
#ifndef _PAGE_NO_EXEC
163-
#define _PAGE_NO_EXEC ({BUG(); 0; })
164-
#endif
182+
/*
183+
* The final layouts of the PTE bits are:
184+
*
185+
* 64-bit, R1 or earlier: CCC D V G [S H] M A W R P
186+
* 32-bit, R1 or earler: CCC D V G M A W R P
187+
* 64-bit, R2 or later: CCC D V G RI/R XI [S H] M A W P
188+
* 32-bit, R2 or later: CCC D V G RI/R XI M A W P
189+
*/
165190

166191

167192
#ifndef __ASSEMBLY__
@@ -171,6 +196,7 @@
171196
*/
172197
static inline uint64_t pte_to_entrylo(unsigned long pte_val)
173198
{
199+
#ifdef CONFIG_CPU_MIPSR2
174200
if (cpu_has_rixi) {
175201
int sa;
176202
#ifdef CONFIG_32BIT
@@ -186,6 +212,7 @@ static inline uint64_t pte_to_entrylo(unsigned long pte_val)
186212
return (pte_val >> _PAGE_GLOBAL_SHIFT) |
187213
((pte_val & (_PAGE_NO_EXEC | _PAGE_NO_READ)) << sa);
188214
}
215+
#endif
189216

190217
return pte_val >> _PAGE_GLOBAL_SHIFT;
191218
}
@@ -245,7 +272,7 @@ static inline uint64_t pte_to_entrylo(unsigned long pte_val)
245272
#define _CACHE_UNCACHED_ACCELERATED (7<<_CACHE_SHIFT)
246273
#endif
247274

248-
#define __READABLE (_PAGE_SILENT_READ | _PAGE_ACCESSED | (cpu_has_rixi ? 0 : _PAGE_READ))
275+
#define __READABLE (_PAGE_SILENT_READ | _PAGE_READ | _PAGE_ACCESSED)
249276
#define __WRITEABLE (_PAGE_SILENT_WRITE | _PAGE_WRITE | _PAGE_MODIFIED)
250277

251278
#define _PAGE_CHG_MASK (_PAGE_ACCESSED | _PAGE_MODIFIED | \

‎arch/mips/include/asm/pgtable.h

Lines changed: 19 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -24,17 +24,17 @@ struct mm_struct;
2424
struct vm_area_struct;
2525

2626
#define PAGE_NONE __pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT)
27-
#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | (cpu_has_rixi ? 0 : _PAGE_READ) | \
27+
#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | \
2828
_page_cachable_default)
29-
#define PAGE_COPY __pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | \
30-
(cpu_has_rixi ? _PAGE_NO_EXEC : 0) | _page_cachable_default)
31-
#define PAGE_READONLY __pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | \
29+
#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_NO_EXEC | \
30+
_page_cachable_default)
31+
#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_READ | \
3232
_page_cachable_default)
3333
#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
3434
_PAGE_GLOBAL | _page_cachable_default)
3535
#define PAGE_KERNEL_NC __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
3636
_PAGE_GLOBAL | _CACHE_CACHABLE_NONCOHERENT)
37-
#define PAGE_USERIO __pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | _PAGE_WRITE | \
37+
#define PAGE_USERIO __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
3838
_page_cachable_default)
3939
#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \
4040
__WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED)
@@ -332,13 +332,13 @@ static inline pte_t pte_mkdirty(pte_t pte)
332332
static inline pte_t pte_mkyoung(pte_t pte)
333333
{
334334
pte_val(pte) |= _PAGE_ACCESSED;
335-
if (cpu_has_rixi) {
336-
if (!(pte_val(pte) & _PAGE_NO_READ))
337-
pte_val(pte) |= _PAGE_SILENT_READ;
338-
} else {
339-
if (pte_val(pte) & _PAGE_READ)
340-
pte_val(pte) |= _PAGE_SILENT_READ;
341-
}
335+
#ifdef CONFIG_CPU_MIPSR2
336+
if (!(pte_val(pte) & _PAGE_NO_READ))
337+
pte_val(pte) |= _PAGE_SILENT_READ;
338+
else
339+
#endif
340+
if (pte_val(pte) & _PAGE_READ)
341+
pte_val(pte) |= _PAGE_SILENT_READ;
342342
return pte;
343343
}
344344

@@ -534,13 +534,13 @@ static inline pmd_t pmd_mkyoung(pmd_t pmd)
534534
{
535535
pmd_val(pmd) |= _PAGE_ACCESSED;
536536

537-
if (cpu_has_rixi) {
538-
if (!(pmd_val(pmd) & _PAGE_NO_READ))
539-
pmd_val(pmd) |= _PAGE_SILENT_READ;
540-
} else {
541-
if (pmd_val(pmd) & _PAGE_READ)
542-
pmd_val(pmd) |= _PAGE_SILENT_READ;
543-
}
537+
#ifdef CONFIG_CPU_MIPSR2
538+
if (!(pmd_val(pmd) & _PAGE_NO_READ))
539+
pmd_val(pmd) |= _PAGE_SILENT_READ;
540+
else
541+
#endif
542+
if (pmd_val(pmd) & _PAGE_READ)
543+
pmd_val(pmd) |= _PAGE_SILENT_READ;
544544

545545
return pmd;
546546
}

‎arch/mips/mm/tlbex.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -231,14 +231,14 @@ static void output_pgtable_bits_defines(void)
231231
pr_define("_PAGE_HUGE_SHIFT %d\n", _PAGE_HUGE_SHIFT);
232232
pr_define("_PAGE_SPLITTING_SHIFT %d\n", _PAGE_SPLITTING_SHIFT);
233233
#endif
234+
#ifdef CONFIG_CPU_MIPSR2
234235
if (cpu_has_rixi) {
235236
#ifdef _PAGE_NO_EXEC_SHIFT
236237
pr_define("_PAGE_NO_EXEC_SHIFT %d\n", _PAGE_NO_EXEC_SHIFT);
237-
#endif
238-
#ifdef _PAGE_NO_READ_SHIFT
239238
pr_define("_PAGE_NO_READ_SHIFT %d\n", _PAGE_NO_READ_SHIFT);
240239
#endif
241240
}
241+
#endif
242242
pr_define("_PAGE_GLOBAL_SHIFT %d\n", _PAGE_GLOBAL_SHIFT);
243243
pr_define("_PAGE_VALID_SHIFT %d\n", _PAGE_VALID_SHIFT);
244244
pr_define("_PAGE_DIRTY_SHIFT %d\n", _PAGE_DIRTY_SHIFT);

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