|
155 | 155 | clocks = <&cpg CPG_MOD 408>;
|
156 | 156 | clock-names = "clk";
|
157 | 157 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 158 | + resets = <&cpg 408>; |
158 | 159 | };
|
159 | 160 |
|
160 | 161 | timer {
|
|
175 | 176 | reg = <0 0xe6020000 0 0x0c>;
|
176 | 177 | clocks = <&cpg CPG_MOD 402>;
|
177 | 178 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 179 | + resets = <&cpg 402>; |
178 | 180 | status = "disabled";
|
179 | 181 | };
|
180 | 182 |
|
|
190 | 192 | interrupt-controller;
|
191 | 193 | clocks = <&cpg CPG_MOD 912>;
|
192 | 194 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 195 | + resets = <&cpg 912>; |
193 | 196 | };
|
194 | 197 |
|
195 | 198 | gpio1: gpio@e6051000 {
|
|
204 | 207 | interrupt-controller;
|
205 | 208 | clocks = <&cpg CPG_MOD 911>;
|
206 | 209 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 210 | + resets = <&cpg 911>; |
207 | 211 | };
|
208 | 212 |
|
209 | 213 | gpio2: gpio@e6052000 {
|
|
218 | 222 | interrupt-controller;
|
219 | 223 | clocks = <&cpg CPG_MOD 910>;
|
220 | 224 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 225 | + resets = <&cpg 910>; |
221 | 226 | };
|
222 | 227 |
|
223 | 228 | gpio3: gpio@e6053000 {
|
|
232 | 237 | interrupt-controller;
|
233 | 238 | clocks = <&cpg CPG_MOD 909>;
|
234 | 239 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 240 | + resets = <&cpg 909>; |
235 | 241 | };
|
236 | 242 |
|
237 | 243 | gpio4: gpio@e6054000 {
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|
246 | 252 | interrupt-controller;
|
247 | 253 | clocks = <&cpg CPG_MOD 908>;
|
248 | 254 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 255 | + resets = <&cpg 908>; |
249 | 256 | };
|
250 | 257 |
|
251 | 258 | gpio5: gpio@e6055000 {
|
|
260 | 267 | interrupt-controller;
|
261 | 268 | clocks = <&cpg CPG_MOD 907>;
|
262 | 269 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 270 | + resets = <&cpg 907>; |
263 | 271 | };
|
264 | 272 |
|
265 | 273 | gpio6: gpio@e6055400 {
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|
274 | 282 | interrupt-controller;
|
275 | 283 | clocks = <&cpg CPG_MOD 906>;
|
276 | 284 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 285 | + resets = <&cpg 906>; |
277 | 286 | };
|
278 | 287 |
|
279 | 288 | gpio7: gpio@e6055800 {
|
|
288 | 297 | interrupt-controller;
|
289 | 298 | clocks = <&cpg CPG_MOD 905>;
|
290 | 299 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 300 | + resets = <&cpg 905>; |
291 | 301 | };
|
292 | 302 |
|
293 | 303 | pfc: pin-controller@e6060000 {
|
|
322 | 332 | clock-names = "extal", "extalr";
|
323 | 333 | #clock-cells = <2>;
|
324 | 334 | #power-domain-cells = <0>;
|
| 335 | + #reset-cells = <1>; |
325 | 336 | };
|
326 | 337 |
|
327 | 338 | rst: reset-controller@e6160000 {
|
|
350 | 361 | interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
|
351 | 362 | clocks = <&cpg CPG_MOD 926>;
|
352 | 363 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 364 | + resets = <&cpg 926>; |
353 | 365 | status = "disabled";
|
354 | 366 | };
|
355 | 367 |
|
|
362 | 374 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
|
363 | 375 | clocks = <&cpg CPG_MOD 931>;
|
364 | 376 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 377 | + resets = <&cpg 931>; |
365 | 378 | dmas = <&dmac1 0x91>, <&dmac1 0x90>,
|
366 | 379 | <&dmac2 0x91>, <&dmac2 0x90>;
|
367 | 380 | dma-names = "tx", "rx", "tx", "rx";
|
|
378 | 391 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
|
379 | 392 | clocks = <&cpg CPG_MOD 930>;
|
380 | 393 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 394 | + resets = <&cpg 930>; |
381 | 395 | dmas = <&dmac1 0x93>, <&dmac1 0x92>,
|
382 | 396 | <&dmac2 0x93>, <&dmac2 0x92>;
|
383 | 397 | dma-names = "tx", "rx", "tx", "rx";
|
|
394 | 408 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
|
395 | 409 | clocks = <&cpg CPG_MOD 929>;
|
396 | 410 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 411 | + resets = <&cpg 929>; |
397 | 412 | dmas = <&dmac1 0x95>, <&dmac1 0x94>,
|
398 | 413 | <&dmac2 0x95>, <&dmac2 0x94>;
|
399 | 414 | dma-names = "tx", "rx", "tx", "rx";
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|
410 | 425 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
|
411 | 426 | clocks = <&cpg CPG_MOD 928>;
|
412 | 427 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 428 | + resets = <&cpg 928>; |
413 | 429 | dmas = <&dmac0 0x97>, <&dmac0 0x96>;
|
414 | 430 | dma-names = "tx", "rx";
|
415 | 431 | i2c-scl-internal-delay-ns = <110>;
|
|
425 | 441 | interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
|
426 | 442 | clocks = <&cpg CPG_MOD 927>;
|
427 | 443 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 444 | + resets = <&cpg 927>; |
428 | 445 | dmas = <&dmac0 0x99>, <&dmac0 0x98>;
|
429 | 446 | dma-names = "tx", "rx";
|
430 | 447 | i2c-scl-internal-delay-ns = <110>;
|
|
440 | 457 | interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
|
441 | 458 | clocks = <&cpg CPG_MOD 919>;
|
442 | 459 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 460 | + resets = <&cpg 919>; |
443 | 461 | dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
|
444 | 462 | dma-names = "tx", "rx";
|
445 | 463 | i2c-scl-internal-delay-ns = <110>;
|
|
455 | 473 | interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
|
456 | 474 | clocks = <&cpg CPG_MOD 918>;
|
457 | 475 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 476 | + resets = <&cpg 918>; |
458 | 477 | dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
|
459 | 478 | dma-names = "tx", "rx";
|
460 | 479 | i2c-scl-internal-delay-ns = <6>;
|
|
473 | 492 | assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
|
474 | 493 | assigned-clock-rates = <40000000>;
|
475 | 494 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 495 | + resets = <&cpg 916>; |
476 | 496 | status = "disabled";
|
477 | 497 | };
|
478 | 498 |
|
|
488 | 508 | assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
|
489 | 509 | assigned-clock-rates = <40000000>;
|
490 | 510 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 511 | + resets = <&cpg 915>; |
491 | 512 | status = "disabled";
|
492 | 513 | };
|
493 | 514 |
|
|
504 | 525 | assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
|
505 | 526 | assigned-clock-rates = <40000000>;
|
506 | 527 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 528 | + resets = <&cpg 914>; |
507 | 529 | status = "disabled";
|
508 | 530 |
|
509 | 531 | channel0 {
|
|
553 | 575 | "ch24";
|
554 | 576 | clocks = <&cpg CPG_MOD 812>;
|
555 | 577 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 578 | + resets = <&cpg 812>; |
556 | 579 | phy-mode = "rgmii-txid";
|
557 | 580 | #address-cells = <1>;
|
558 | 581 | #size-cells = <0>;
|
|
573 | 596 | <&dmac2 0x31>, <&dmac2 0x30>;
|
574 | 597 | dma-names = "tx", "rx", "tx", "rx";
|
575 | 598 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 599 | + resets = <&cpg 520>; |
576 | 600 | status = "disabled";
|
577 | 601 | };
|
578 | 602 |
|
|
590 | 614 | <&dmac2 0x33>, <&dmac2 0x32>;
|
591 | 615 | dma-names = "tx", "rx", "tx", "rx";
|
592 | 616 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 617 | + resets = <&cpg 519>; |
593 | 618 | status = "disabled";
|
594 | 619 | };
|
595 | 620 |
|
|
607 | 632 | <&dmac2 0x35>, <&dmac2 0x34>;
|
608 | 633 | dma-names = "tx", "rx", "tx", "rx";
|
609 | 634 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 635 | + resets = <&cpg 518>; |
610 | 636 | status = "disabled";
|
611 | 637 | };
|
612 | 638 |
|
|
623 | 649 | dmas = <&dmac0 0x37>, <&dmac0 0x36>;
|
624 | 650 | dma-names = "tx", "rx";
|
625 | 651 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 652 | + resets = <&cpg 517>; |
626 | 653 | status = "disabled";
|
627 | 654 | };
|
628 | 655 |
|
|
639 | 666 | dmas = <&dmac0 0x39>, <&dmac0 0x38>;
|
640 | 667 | dma-names = "tx", "rx";
|
641 | 668 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 669 | + resets = <&cpg 516>; |
642 | 670 | status = "disabled";
|
643 | 671 | };
|
644 | 672 |
|
|
655 | 683 | <&dmac2 0x51>, <&dmac2 0x50>;
|
656 | 684 | dma-names = "tx", "rx", "tx", "rx";
|
657 | 685 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 686 | + resets = <&cpg 207>; |
658 | 687 | status = "disabled";
|
659 | 688 | };
|
660 | 689 |
|
|
671 | 700 | <&dmac2 0x53>, <&dmac2 0x52>;
|
672 | 701 | dma-names = "tx", "rx", "tx", "rx";
|
673 | 702 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 703 | + resets = <&cpg 206>; |
674 | 704 | status = "disabled";
|
675 | 705 | };
|
676 | 706 |
|
|
684 | 714 | <&scif_clk>;
|
685 | 715 | clock-names = "fck", "brg_int", "scif_clk";
|
686 | 716 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 717 | + resets = <&cpg 310>; |
687 | 718 | status = "disabled";
|
688 | 719 | };
|
689 | 720 |
|
|
699 | 730 | dmas = <&dmac0 0x57>, <&dmac0 0x56>;
|
700 | 731 | dma-names = "tx", "rx";
|
701 | 732 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 733 | + resets = <&cpg 204>; |
702 | 734 | status = "disabled";
|
703 | 735 | };
|
704 | 736 |
|
|
714 | 746 | dmas = <&dmac0 0x59>, <&dmac0 0x58>;
|
715 | 747 | dma-names = "tx", "rx";
|
716 | 748 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 749 | + resets = <&cpg 203>; |
717 | 750 | status = "disabled";
|
718 | 751 | };
|
719 | 752 |
|
|
730 | 763 | <&dmac2 0x5b>, <&dmac2 0x5a>;
|
731 | 764 | dma-names = "tx", "rx", "tx", "rx";
|
732 | 765 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 766 | + resets = <&cpg 202>; |
733 | 767 | status = "disabled";
|
734 | 768 | };
|
735 | 769 |
|
|
743 | 777 | <&dmac2 0x41>, <&dmac2 0x40>;
|
744 | 778 | dma-names = "tx", "rx";
|
745 | 779 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 780 | + resets = <&cpg 211>; |
746 | 781 | #address-cells = <1>;
|
747 | 782 | #size-cells = <0>;
|
748 | 783 | status = "disabled";
|
|
758 | 793 | <&dmac2 0x43>, <&dmac2 0x42>;
|
759 | 794 | dma-names = "tx", "rx";
|
760 | 795 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 796 | + resets = <&cpg 210>; |
761 | 797 | #address-cells = <1>;
|
762 | 798 | #size-cells = <0>;
|
763 | 799 | status = "disabled";
|
|
772 | 808 | dmas = <&dmac0 0x45>, <&dmac0 0x44>;
|
773 | 809 | dma-names = "tx", "rx";
|
774 | 810 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 811 | + resets = <&cpg 209>; |
775 | 812 | #address-cells = <1>;
|
776 | 813 | #size-cells = <0>;
|
777 | 814 | status = "disabled";
|
|
786 | 823 | dmas = <&dmac0 0x47>, <&dmac0 0x46>;
|
787 | 824 | dma-names = "tx", "rx";
|
788 | 825 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 826 | + resets = <&cpg 208>; |
789 | 827 | #address-cells = <1>;
|
790 | 828 | #size-cells = <0>;
|
791 | 829 | status = "disabled";
|
|
820 | 858 | clocks = <&cpg CPG_MOD 219>;
|
821 | 859 | clock-names = "fck";
|
822 | 860 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 861 | + resets = <&cpg 219>; |
823 | 862 | #dma-cells = <1>;
|
824 | 863 | dma-channels = <16>;
|
825 | 864 | };
|
|
853 | 892 | clocks = <&cpg CPG_MOD 218>;
|
854 | 893 | clock-names = "fck";
|
855 | 894 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 895 | + resets = <&cpg 218>; |
856 | 896 | #dma-cells = <1>;
|
857 | 897 | dma-channels = <16>;
|
858 | 898 | };
|
|
886 | 926 | clocks = <&cpg CPG_MOD 217>;
|
887 | 927 | clock-names = "fck";
|
888 | 928 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 929 | + resets = <&cpg 217>; |
889 | 930 | #dma-cells = <1>;
|
890 | 931 | dma-channels = <16>;
|
891 | 932 | };
|
|
897 | 938 | clocks = <&cpg CPG_MOD 314>;
|
898 | 939 | max-frequency = <200000000>;
|
899 | 940 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 941 | + resets = <&cpg 314>; |
900 | 942 | status = "disabled";
|
901 | 943 | };
|
902 | 944 |
|
|
907 | 949 | clocks = <&cpg CPG_MOD 313>;
|
908 | 950 | max-frequency = <200000000>;
|
909 | 951 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 952 | + resets = <&cpg 313>; |
910 | 953 | status = "disabled";
|
911 | 954 | };
|
912 | 955 |
|
|
917 | 960 | clocks = <&cpg CPG_MOD 312>;
|
918 | 961 | max-frequency = <200000000>;
|
919 | 962 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 963 | + resets = <&cpg 312>; |
920 | 964 | status = "disabled";
|
921 | 965 | };
|
922 | 966 |
|
|
927 | 971 | clocks = <&cpg CPG_MOD 311>;
|
928 | 972 | max-frequency = <200000000>;
|
929 | 973 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 974 | + resets = <&cpg 311>; |
930 | 975 | status = "disabled";
|
931 | 976 | };
|
932 | 977 |
|
|
940 | 985 | <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
|
941 | 986 | clocks = <&cpg CPG_MOD 522>;
|
942 | 987 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
| 988 | + resets = <&cpg 522>; |
943 | 989 | #thermal-sensor-cells = <1>;
|
944 | 990 | status = "okay";
|
945 | 991 | };
|
|
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