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Merge tag 'drm-next-2018-06-15' of git://anongit.freedesktop.org/drm/drm
Pull amd drm fixes from Dave Airlie: "Just a single set of AMD fixes for stuff in -next for -rc1" * tag 'drm-next-2018-06-15' of git://anongit.freedesktop.org/drm/drm: (47 commits) drm/amd/powerplay: Set higher SCLK&MCLK frequency than dpm7 in OD (v2) drm/amd/powerplay: remove uncessary extra gfxoff control call drm/amdgpu: fix parsing indirect register list v2 drm/amd/include: Update df 3.6 mask and shift definition drm/amd/pp: Fix OD feature enable failed on Vega10 workstation cards drm/amd/display: Fix stale buffer object (bo) use drm/amd/pp: initialize result to before or'ing in data drm/amd/powerplay: fix wrong clock adjust sequence drm/amdgpu: Grab/put runtime PM references in atomic_commit_tail() drm/amd/powerplay: fix missed hwmgr check warning before call gfx_off_control handler drm/amdgpu: fix CG enabling hang with gfxoff enabled drm/amdgpu: fix clear_all and replace handling in the VM (v2) drm/amdgpu: add checking for sos version drm/amdgpu: fix the missed vcn fw version report Revert "drm/amdgpu: Add an ATPX quirk for hybrid laptop" drm/amdgpu/df: fix potential array out-of-bounds read drm/amdgpu: Fix NULL pointer when load kfd driver with PP block is disabled drm/gfx9: Update gc goldensetting for vega20. drm/amd/pp: Allow underclocking when od table is empty in vbios drm/amdgpu/display: check if ppfuncs exists before using it ...
2 parents b5d903c + daf0678 commit becfc5e

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43 files changed

+365
-249
lines changed

‎drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c

Lines changed: 7 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -342,15 +342,12 @@ void get_local_mem_info(struct kgd_dev *kgd,
342342
mem_info->local_mem_size_public,
343343
mem_info->local_mem_size_private);
344344

345-
if (amdgpu_emu_mode == 1) {
346-
mem_info->mem_clk_max = 100;
347-
return;
348-
}
349-
350345
if (amdgpu_sriov_vf(adev))
351346
mem_info->mem_clk_max = adev->clock.default_mclk / 100;
352-
else
347+
else if (adev->powerplay.pp_funcs)
353348
mem_info->mem_clk_max = amdgpu_dpm_get_mclk(adev, false) / 100;
349+
else
350+
mem_info->mem_clk_max = 100;
354351
}
355352

356353
uint64_t get_gpu_clock_counter(struct kgd_dev *kgd)
@@ -367,13 +364,12 @@ uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd)
367364
struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
368365

369366
/* the sclk is in quantas of 10kHz */
370-
if (amdgpu_emu_mode == 1)
371-
return 100;
372-
373367
if (amdgpu_sriov_vf(adev))
374368
return adev->clock.default_sclk / 100;
375-
376-
return amdgpu_dpm_get_sclk(adev, false) / 100;
369+
else if (adev->powerplay.pp_funcs)
370+
return amdgpu_dpm_get_sclk(adev, false) / 100;
371+
else
372+
return 100;
377373
}
378374

379375
void get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info *cu_info)

‎drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -569,7 +569,6 @@ static const struct amdgpu_px_quirk amdgpu_px_quirk_list[] = {
569569
{ 0x1002, 0x6900, 0x1002, 0x0124, AMDGPU_PX_QUIRK_FORCE_ATPX },
570570
{ 0x1002, 0x6900, 0x1028, 0x0812, AMDGPU_PX_QUIRK_FORCE_ATPX },
571571
{ 0x1002, 0x6900, 0x1028, 0x0813, AMDGPU_PX_QUIRK_FORCE_ATPX },
572-
{ 0x1002, 0x67DF, 0x1028, 0x0774, AMDGPU_PX_QUIRK_FORCE_ATPX },
573572
{ 0, 0, 0, 0, 0 },
574573
};
575574

‎drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

Lines changed: 23 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -522,6 +522,9 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p,
522522
struct amdgpu_bo_list_entry *e;
523523
struct list_head duplicates;
524524
unsigned i, tries = 10;
525+
struct amdgpu_bo *gds;
526+
struct amdgpu_bo *gws;
527+
struct amdgpu_bo *oa;
525528
int r;
526529

527530
INIT_LIST_HEAD(&p->validated);
@@ -652,31 +655,36 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p,
652655

653656
amdgpu_cs_report_moved_bytes(p->adev, p->bytes_moved,
654657
p->bytes_moved_vis);
658+
655659
if (p->bo_list) {
656-
struct amdgpu_bo *gds = p->bo_list->gds_obj;
657-
struct amdgpu_bo *gws = p->bo_list->gws_obj;
658-
struct amdgpu_bo *oa = p->bo_list->oa_obj;
659660
struct amdgpu_vm *vm = &fpriv->vm;
660661
unsigned i;
661662

663+
gds = p->bo_list->gds_obj;
664+
gws = p->bo_list->gws_obj;
665+
oa = p->bo_list->oa_obj;
662666
for (i = 0; i < p->bo_list->num_entries; i++) {
663667
struct amdgpu_bo *bo = p->bo_list->array[i].robj;
664668

665669
p->bo_list->array[i].bo_va = amdgpu_vm_bo_find(vm, bo);
666670
}
671+
} else {
672+
gds = p->adev->gds.gds_gfx_bo;
673+
gws = p->adev->gds.gws_gfx_bo;
674+
oa = p->adev->gds.oa_gfx_bo;
675+
}
667676

668-
if (gds) {
669-
p->job->gds_base = amdgpu_bo_gpu_offset(gds);
670-
p->job->gds_size = amdgpu_bo_size(gds);
671-
}
672-
if (gws) {
673-
p->job->gws_base = amdgpu_bo_gpu_offset(gws);
674-
p->job->gws_size = amdgpu_bo_size(gws);
675-
}
676-
if (oa) {
677-
p->job->oa_base = amdgpu_bo_gpu_offset(oa);
678-
p->job->oa_size = amdgpu_bo_size(oa);
679-
}
677+
if (gds) {
678+
p->job->gds_base = amdgpu_bo_gpu_offset(gds);
679+
p->job->gds_size = amdgpu_bo_size(gds);
680+
}
681+
if (gws) {
682+
p->job->gws_base = amdgpu_bo_gpu_offset(gws);
683+
p->job->gws_size = amdgpu_bo_size(gws);
684+
}
685+
if (oa) {
686+
p->job->oa_base = amdgpu_bo_gpu_offset(oa);
687+
p->job->oa_size = amdgpu_bo_size(oa);
680688
}
681689

682690
if (!r && p->uf_entry.robj) {

‎drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1730,6 +1730,18 @@ static int amdgpu_device_ip_late_set_cg_state(struct amdgpu_device *adev)
17301730
}
17311731
}
17321732
}
1733+
1734+
if (adev->powerplay.pp_feature & PP_GFXOFF_MASK) {
1735+
/* enable gfx powergating */
1736+
amdgpu_device_ip_set_powergating_state(adev,
1737+
AMD_IP_BLOCK_TYPE_GFX,
1738+
AMD_PG_STATE_GATE);
1739+
/* enable gfxoff */
1740+
amdgpu_device_ip_set_powergating_state(adev,
1741+
AMD_IP_BLOCK_TYPE_SMC,
1742+
AMD_PG_STATE_GATE);
1743+
}
1744+
17331745
return 0;
17341746
}
17351747

‎drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

Lines changed: 12 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -30,6 +30,7 @@
3030
#include <drm/drmP.h>
3131
#include <drm/amdgpu_drm.h>
3232
#include "amdgpu.h"
33+
#include "amdgpu_display.h"
3334

3435
void amdgpu_gem_object_free(struct drm_gem_object *gobj)
3536
{
@@ -235,6 +236,13 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
235236
/* create a gem object to contain this object in */
236237
if (args->in.domains & (AMDGPU_GEM_DOMAIN_GDS |
237238
AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)) {
239+
if (flags & AMDGPU_GEM_CREATE_VM_ALWAYS_VALID) {
240+
/* if gds bo is created from user space, it must be
241+
* passed to bo list
242+
*/
243+
DRM_ERROR("GDS bo cannot be per-vm-bo\n");
244+
return -EINVAL;
245+
}
238246
flags |= AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
239247
if (args->in.domains == AMDGPU_GEM_DOMAIN_GDS)
240248
size = size << AMDGPU_GDS_SHIFT;
@@ -749,15 +757,16 @@ int amdgpu_mode_dumb_create(struct drm_file *file_priv,
749757
struct amdgpu_device *adev = dev->dev_private;
750758
struct drm_gem_object *gobj;
751759
uint32_t handle;
760+
u32 domain;
752761
int r;
753762

754763
args->pitch = amdgpu_align_pitch(adev, args->width,
755764
DIV_ROUND_UP(args->bpp, 8), 0);
756765
args->size = (u64)args->pitch * args->height;
757766
args->size = ALIGN(args->size, PAGE_SIZE);
758-
759-
r = amdgpu_gem_object_create(adev, args->size, 0,
760-
AMDGPU_GEM_DOMAIN_VRAM,
767+
domain = amdgpu_bo_get_preferred_pin_domain(adev,
768+
amdgpu_display_supported_domains(adev));
769+
r = amdgpu_gem_object_create(adev, args->size, 0, domain,
761770
AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
762771
false, NULL, &gobj);
763772
if (r)

‎drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

Lines changed: 12 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -703,11 +703,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
703703
/* This assumes only APU display buffers are pinned with (VRAM|GTT).
704704
* See function amdgpu_display_supported_domains()
705705
*/
706-
if (domain == (AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT)) {
707-
domain = AMDGPU_GEM_DOMAIN_VRAM;
708-
if (adev->gmc.real_vram_size <= AMDGPU_SG_THRESHOLD)
709-
domain = AMDGPU_GEM_DOMAIN_GTT;
710-
}
706+
domain = amdgpu_bo_get_preferred_pin_domain(adev, domain);
711707

712708
if (bo->pin_count) {
713709
uint32_t mem_type = bo->tbo.mem.mem_type;
@@ -1066,3 +1062,14 @@ u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo)
10661062

10671063
return bo->tbo.offset;
10681064
}
1065+
1066+
uint32_t amdgpu_bo_get_preferred_pin_domain(struct amdgpu_device *adev,
1067+
uint32_t domain)
1068+
{
1069+
if (domain == (AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT)) {
1070+
domain = AMDGPU_GEM_DOMAIN_VRAM;
1071+
if (adev->gmc.real_vram_size <= AMDGPU_SG_THRESHOLD)
1072+
domain = AMDGPU_GEM_DOMAIN_GTT;
1073+
}
1074+
return domain;
1075+
}

‎drivers/gpu/drm/amd/amdgpu/amdgpu_object.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -289,7 +289,8 @@ int amdgpu_bo_restore_from_shadow(struct amdgpu_device *adev,
289289
struct reservation_object *resv,
290290
struct dma_fence **fence,
291291
bool direct);
292-
292+
uint32_t amdgpu_bo_get_preferred_pin_domain(struct amdgpu_device *adev,
293+
uint32_t domain);
293294

294295
/*
295296
* sub allocation

‎drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

Lines changed: 11 additions & 41 deletions
Original file line numberDiff line numberDiff line change
@@ -49,8 +49,6 @@ static void amdgpu_vcn_idle_work_handler(struct work_struct *work);
4949

5050
int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
5151
{
52-
struct amdgpu_ring *ring;
53-
struct drm_sched_rq *rq;
5452
unsigned long bo_size;
5553
const char *fw_name;
5654
const struct common_firmware_header *hdr;
@@ -84,6 +82,7 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
8482
}
8583

8684
hdr = (const struct common_firmware_header *)adev->vcn.fw->data;
85+
adev->vcn.fw_version = le32_to_cpu(hdr->ucode_version);
8786
family_id = le32_to_cpu(hdr->ucode_version) & 0xff;
8887
version_major = (le32_to_cpu(hdr->ucode_version) >> 24) & 0xff;
8988
version_minor = (le32_to_cpu(hdr->ucode_version) >> 8) & 0xff;
@@ -102,24 +101,6 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
102101
return r;
103102
}
104103

105-
ring = &adev->vcn.ring_dec;
106-
rq = &ring->sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL];
107-
r = drm_sched_entity_init(&ring->sched, &adev->vcn.entity_dec,
108-
rq, NULL);
109-
if (r != 0) {
110-
DRM_ERROR("Failed setting up VCN dec run queue.\n");
111-
return r;
112-
}
113-
114-
ring = &adev->vcn.ring_enc[0];
115-
rq = &ring->sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL];
116-
r = drm_sched_entity_init(&ring->sched, &adev->vcn.entity_enc,
117-
rq, NULL);
118-
if (r != 0) {
119-
DRM_ERROR("Failed setting up VCN enc run queue.\n");
120-
return r;
121-
}
122-
123104
return 0;
124105
}
125106

@@ -129,10 +110,6 @@ int amdgpu_vcn_sw_fini(struct amdgpu_device *adev)
129110

130111
kfree(adev->vcn.saved_bo);
131112

132-
drm_sched_entity_fini(&adev->vcn.ring_dec.sched, &adev->vcn.entity_dec);
133-
134-
drm_sched_entity_fini(&adev->vcn.ring_enc[0].sched, &adev->vcn.entity_enc);
135-
136113
amdgpu_bo_free_kernel(&adev->vcn.vcpu_bo,
137114
&adev->vcn.gpu_addr,
138115
(void **)&adev->vcn.cpu_addr);
@@ -278,7 +255,7 @@ int amdgpu_vcn_dec_ring_test_ring(struct amdgpu_ring *ring)
278255
}
279256

280257
static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring,
281-
struct amdgpu_bo *bo, bool direct,
258+
struct amdgpu_bo *bo,
282259
struct dma_fence **fence)
283260
{
284261
struct amdgpu_device *adev = ring->adev;
@@ -306,19 +283,12 @@ static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring,
306283
}
307284
ib->length_dw = 16;
308285

309-
if (direct) {
310-
r = amdgpu_ib_schedule(ring, 1, ib, NULL, &f);
311-
job->fence = dma_fence_get(f);
312-
if (r)
313-
goto err_free;
286+
r = amdgpu_ib_schedule(ring, 1, ib, NULL, &f);
287+
job->fence = dma_fence_get(f);
288+
if (r)
289+
goto err_free;
314290

315-
amdgpu_job_free(job);
316-
} else {
317-
r = amdgpu_job_submit(job, ring, &adev->vcn.entity_dec,
318-
AMDGPU_FENCE_OWNER_UNDEFINED, &f);
319-
if (r)
320-
goto err_free;
321-
}
291+
amdgpu_job_free(job);
322292

323293
amdgpu_bo_fence(bo, f, false);
324294
amdgpu_bo_unreserve(bo);
@@ -370,11 +340,11 @@ static int amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t hand
370340
for (i = 14; i < 1024; ++i)
371341
msg[i] = cpu_to_le32(0x0);
372342

373-
return amdgpu_vcn_dec_send_msg(ring, bo, true, fence);
343+
return amdgpu_vcn_dec_send_msg(ring, bo, fence);
374344
}
375345

376346
static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
377-
bool direct, struct dma_fence **fence)
347+
struct dma_fence **fence)
378348
{
379349
struct amdgpu_device *adev = ring->adev;
380350
struct amdgpu_bo *bo = NULL;
@@ -396,7 +366,7 @@ static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
396366
for (i = 6; i < 1024; ++i)
397367
msg[i] = cpu_to_le32(0x0);
398368

399-
return amdgpu_vcn_dec_send_msg(ring, bo, direct, fence);
369+
return amdgpu_vcn_dec_send_msg(ring, bo, fence);
400370
}
401371

402372
int amdgpu_vcn_dec_ring_test_ib(struct amdgpu_ring *ring, long timeout)
@@ -410,7 +380,7 @@ int amdgpu_vcn_dec_ring_test_ib(struct amdgpu_ring *ring, long timeout)
410380
goto error;
411381
}
412382

413-
r = amdgpu_vcn_dec_get_destroy_msg(ring, 1, true, &fence);
383+
r = amdgpu_vcn_dec_get_destroy_msg(ring, 1, &fence);
414384
if (r) {
415385
DRM_ERROR("amdgpu: failed to get destroy ib (%ld).\n", r);
416386
goto error;

‎drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -67,8 +67,6 @@ struct amdgpu_vcn {
6767
struct amdgpu_ring ring_dec;
6868
struct amdgpu_ring ring_enc[AMDGPU_VCN_MAX_ENC_RINGS];
6969
struct amdgpu_irq_src irq;
70-
struct drm_sched_entity entity_dec;
71-
struct drm_sched_entity entity_enc;
7270
unsigned num_enc_rings;
7371
};
7472

‎drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2123,7 +2123,8 @@ int amdgpu_vm_bo_clear_mappings(struct amdgpu_device *adev,
21232123
before->last = saddr - 1;
21242124
before->offset = tmp->offset;
21252125
before->flags = tmp->flags;
2126-
list_add(&before->list, &tmp->list);
2126+
before->bo_va = tmp->bo_va;
2127+
list_add(&before->list, &tmp->bo_va->invalids);
21272128
}
21282129

21292130
/* Remember mapping split at the end */
@@ -2133,7 +2134,8 @@ int amdgpu_vm_bo_clear_mappings(struct amdgpu_device *adev,
21332134
after->offset = tmp->offset;
21342135
after->offset += after->start - tmp->start;
21352136
after->flags = tmp->flags;
2136-
list_add(&after->list, &tmp->list);
2137+
after->bo_va = tmp->bo_va;
2138+
list_add(&after->list, &tmp->bo_va->invalids);
21372139
}
21382140

21392141
list_del(&tmp->list);

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