@@ -204,8 +204,8 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi,
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{
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struct spi_imx_data * spi_imx = spi_master_get_devdata (master );
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- if (spi_imx -> dma_is_inited &&
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- transfer -> len > spi_imx -> wml * sizeof ( u32 ) )
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+ if (spi_imx -> dma_is_inited && transfer -> len >= spi_imx -> wml &&
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+ ( transfer -> len % spi_imx -> wml ) == 0 )
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return true;
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return false;
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}
@@ -919,8 +919,6 @@ static int spi_imx_dma_transfer(struct spi_imx_data *spi_imx,
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struct dma_async_tx_descriptor * desc_tx = NULL , * desc_rx = NULL ;
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int ret ;
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unsigned long timeout ;
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- u32 dma ;
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- int left ;
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struct spi_master * master = spi_imx -> bitbang .master ;
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struct sg_table * tx = & transfer -> tx_sg , * rx = & transfer -> rx_sg ;
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@@ -954,13 +952,6 @@ static int spi_imx_dma_transfer(struct spi_imx_data *spi_imx,
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/* Trigger the cspi module. */
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spi_imx -> dma_finished = 0 ;
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- dma = readl (spi_imx -> base + MX51_ECSPI_DMA );
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- dma = dma & (~MX51_ECSPI_DMA_RXT_WML_MASK );
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- /* Change RX_DMA_LENGTH trigger dma fetch tail data */
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- left = transfer -> len % spi_imx -> wml ;
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- if (left )
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- writel (dma | (left << MX51_ECSPI_DMA_RXT_WML_OFFSET ),
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- spi_imx -> base + MX51_ECSPI_DMA );
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/*
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* Set these order to avoid potential RX overflow. The overflow may
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* happen if we enable SPI HW before starting RX DMA due to rescheduling
@@ -992,10 +983,6 @@ static int spi_imx_dma_transfer(struct spi_imx_data *spi_imx,
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spi_imx -> devtype_data -> reset (spi_imx );
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dmaengine_terminate_all (master -> dma_rx );
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}
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- dma &= ~MX51_ECSPI_DMA_RXT_WML_MASK ;
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- writel (dma |
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- spi_imx -> wml << MX51_ECSPI_DMA_RXT_WML_OFFSET ,
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- spi_imx -> base + MX51_ECSPI_DMA );
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}
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spi_imx -> dma_finished = 1 ;
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