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Merge tag 'renesas-soc2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Second Round of Renesas ARM Based SoC Updates for v4.8 * Add DT support to the APMU driver and prioritise DT APMU support * Obtain extal frequency from DT * Add support for r8a7792 * tag 'renesas-soc2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7791: Prioritize DT APMU support ARM: shmobile: r8a7790: Prioritize DT APMU support ARM: shmobile: smp: Add function to prioritize DT SMP ARM: shmobile: apmu: Add APMU DT support via Enable method ARM: shmobile: apmu: Move #ifdef CONFIG_SMP to cover more functions ARM: shmobile: rcar-gen2: Correct arch timer frequency on R-Car V2H ARM: shmobile: rcar-gen2: Obtain extal frequency from DT ARM: shmobile: r8a7792: basic SoC support soc: renesas: rcar-sysc: Improve SYSC interrupt config in legacy wrapper soc: renesas: rcar-sysc: Move SYSC interrupt config to rcar-sysc driver soc: renesas: rcar-sysc: Make rcar_sysc_init() init the PM domains soc: renesas: rcar-sysc: Fix uninitialized error code in rcar_sysc_pd_init() soc: renesas: rcar-sysc: add R8A7792 support soc: renesas: rcar-sysc: Add support for R-Car M3-W power areas soc: renesas: Add r8a7796 SYSC PM Domain Binding Definitions soc: renesas: rcar-sysc: Document r8a7796 support Signed-off-by: Olof Johansson <olof@lixom.net>
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‎Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@ Required properties:
1414
- "renesas,r8a7793-sysc" (R-Car M2-N)
1515
- "renesas,r8a7794-sysc" (R-Car E2)
1616
- "renesas,r8a7795-sysc" (R-Car H3)
17+
- "renesas,r8a7796-sysc" (R-Car M3-W)
1718
- reg: Address start and address range for the device.
1819
- #power-domain-cells: Must be 1.
1920

‎arch/arm/mach-shmobile/Kconfig

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -86,6 +86,10 @@ config ARCH_R8A7791
8686
select ARCH_RCAR_GEN2
8787
select I2C
8888

89+
config ARCH_R8A7792
90+
bool "R-Car V2H (R8A77920)"
91+
select ARCH_RCAR_GEN2
92+
8993
config ARCH_R8A7793
9094
bool "R-Car M2-N (R8A7793)"
9195
select ARCH_RCAR_GEN2

‎arch/arm/mach-shmobile/Makefile

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@ obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o
1313
obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o pm-r8a7779.o
1414
obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o
1515
obj-$(CONFIG_ARCH_R8A7791) += setup-r8a7791.o
16+
obj-$(CONFIG_ARCH_R8A7792) += setup-r8a7792.o
1617
obj-$(CONFIG_ARCH_R8A7793) += setup-r8a7793.o
1718
obj-$(CONFIG_ARCH_R8A7794) += setup-r8a7794.o
1819
obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o

‎arch/arm/mach-shmobile/common.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,7 @@ extern void shmobile_smp_sleep(void);
1010
extern void shmobile_smp_hook(unsigned int cpu, unsigned long fn,
1111
unsigned long arg);
1212
extern bool shmobile_smp_cpu_can_disable(unsigned int cpu);
13+
extern bool shmobile_smp_init_fallback_ops(void);
1314
extern void shmobile_boot_scu(void);
1415
extern void shmobile_smp_scu_prepare_cpus(phys_addr_t scu_base_phys,
1516
unsigned int max_cpus);

‎arch/arm/mach-shmobile/platsmp-apmu.c

Lines changed: 89 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,7 @@
2424
#include <asm/suspend.h>
2525
#include "common.h"
2626
#include "platsmp-apmu.h"
27+
#include "rcar-gen2.h"
2728

2829
static struct {
2930
void __iomem *iomem;
@@ -74,6 +75,7 @@ static int __maybe_unused apmu_wrap(int cpu, int (*fn)(void __iomem *p, int cpu)
7475
return p ? fn(p, apmu_cpus[cpu].bit) : -EINVAL;
7576
}
7677

78+
#ifdef CONFIG_SMP
7779
static void apmu_init_cpu(struct resource *res, int cpu, int bit)
7880
{
7981
if ((cpu >= ARRAY_SIZE(apmu_cpus)) || apmu_cpus[cpu].iomem)
@@ -117,26 +119,108 @@ static void apmu_parse_cfg(void (*fn)(struct resource *res, int cpu, int bit),
117119
}
118120
}
119121

120-
void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
121-
struct rcar_apmu_config *apmu_config,
122-
int num)
122+
static const struct of_device_id apmu_ids[] = {
123+
{ .compatible = "renesas,apmu" },
124+
{ /*sentinel*/ }
125+
};
126+
127+
static void apmu_parse_dt(void (*fn)(struct resource *res, int cpu, int bit))
128+
{
129+
struct device_node *np_apmu, *np_cpu;
130+
struct resource res;
131+
int bit, index;
132+
u32 id;
133+
134+
for_each_matching_node(np_apmu, apmu_ids) {
135+
/* only enable the cluster that includes the boot CPU */
136+
bool is_allowed = false;
137+
138+
for (bit = 0; bit < CONFIG_NR_CPUS; bit++) {
139+
np_cpu = of_parse_phandle(np_apmu, "cpus", bit);
140+
if (np_cpu) {
141+
if (!of_property_read_u32(np_cpu, "reg", &id)) {
142+
if (id == cpu_logical_map(0)) {
143+
is_allowed = true;
144+
of_node_put(np_cpu);
145+
break;
146+
}
147+
148+
}
149+
of_node_put(np_cpu);
150+
}
151+
}
152+
if (!is_allowed)
153+
continue;
154+
155+
for (bit = 0; bit < CONFIG_NR_CPUS; bit++) {
156+
np_cpu = of_parse_phandle(np_apmu, "cpus", bit);
157+
if (np_cpu) {
158+
if (!of_property_read_u32(np_cpu, "reg", &id)) {
159+
index = get_logical_index(id);
160+
if ((index >= 0) &&
161+
!of_address_to_resource(np_apmu,
162+
0, &res))
163+
fn(&res, index, bit);
164+
}
165+
of_node_put(np_cpu);
166+
}
167+
}
168+
}
169+
}
170+
171+
static void __init shmobile_smp_apmu_setup_boot(void)
123172
{
124173
/* install boot code shared by all CPUs */
125174
shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
175+
}
126176

127-
/* perform per-cpu setup */
177+
void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
178+
struct rcar_apmu_config *apmu_config,
179+
int num)
180+
{
181+
shmobile_smp_apmu_setup_boot();
128182
apmu_parse_cfg(apmu_init_cpu, apmu_config, num);
129183
}
130184

131-
#ifdef CONFIG_SMP
132185
int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle)
133186
{
134187
/* For this particular CPU register boot vector */
135188
shmobile_smp_hook(cpu, virt_to_phys(secondary_startup), 0);
136189

137190
return apmu_wrap(cpu, apmu_power_on);
138191
}
192+
193+
static void __init shmobile_smp_apmu_prepare_cpus_dt(unsigned int max_cpus)
194+
{
195+
shmobile_smp_apmu_setup_boot();
196+
apmu_parse_dt(apmu_init_cpu);
197+
rcar_gen2_pm_init();
198+
}
199+
200+
static int shmobile_smp_apmu_boot_secondary_md21(unsigned int cpu,
201+
struct task_struct *idle)
202+
{
203+
/* Error out when hardware debug mode is enabled */
204+
if (rcar_gen2_read_mode_pins() & BIT(21)) {
205+
pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu);
206+
return -ENOTSUPP;
207+
}
208+
209+
return shmobile_smp_apmu_boot_secondary(cpu, idle);
210+
}
211+
212+
static struct smp_operations apmu_smp_ops __initdata = {
213+
.smp_prepare_cpus = shmobile_smp_apmu_prepare_cpus_dt,
214+
.smp_boot_secondary = shmobile_smp_apmu_boot_secondary_md21,
215+
#ifdef CONFIG_HOTPLUG_CPU
216+
.cpu_can_disable = shmobile_smp_cpu_can_disable,
217+
.cpu_die = shmobile_smp_apmu_cpu_die,
218+
.cpu_kill = shmobile_smp_apmu_cpu_kill,
139219
#endif
220+
};
221+
222+
CPU_METHOD_OF_DECLARE(shmobile_smp_apmu, "renesas,apmu", &apmu_smp_ops);
223+
#endif /* CONFIG_SMP */
140224

141225
#if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_SUSPEND)
142226
/* nicked from arch/arm/mach-exynos/hotplug.c */

‎arch/arm/mach-shmobile/platsmp.c

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -36,3 +36,9 @@ bool shmobile_smp_cpu_can_disable(unsigned int cpu)
3636
return true; /* Hotplug of any CPU is supported */
3737
}
3838
#endif
39+
40+
bool __init shmobile_smp_init_fallback_ops(void)
41+
{
42+
/* fallback on PSCI/smp_ops if no other DT based method is detected */
43+
return platform_can_secondary_boot() ? true : false;
44+
}

‎arch/arm/mach-shmobile/pm-r8a7779.c

Lines changed: 1 addition & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -23,11 +23,7 @@
2323

2424
static void __init r8a7779_sysc_init(void)
2525
{
26-
void __iomem *base = rcar_sysc_init(0xffd85000);
27-
28-
/* enable all interrupt sources, but do not use interrupt handler */
29-
iowrite32(0x0131000e, base + SYSCIER);
30-
iowrite32(0, base + SYSCIMR);
26+
rcar_sysc_init(0xffd85000, 0x0131000e);
3127
}
3228

3329
#else /* CONFIG_PM || CONFIG_SMP */

‎arch/arm/mach-shmobile/pm-rcar-gen2.c

Lines changed: 1 addition & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -36,11 +36,7 @@
3636

3737
static void __init rcar_gen2_sysc_init(u32 syscier)
3838
{
39-
void __iomem *base = rcar_sysc_init(0xe6180000);
40-
41-
/* enable all interrupt sources, but do not use interrupt handler */
42-
iowrite32(syscier, base + SYSCIER);
43-
iowrite32(0, base + SYSCIMR);
39+
rcar_sysc_init(0xe6180000, syscier);
4440
}
4541

4642
#else /* CONFIG_SMP */

‎arch/arm/mach-shmobile/setup-r8a7790.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,7 @@ static const char * const r8a7790_boards_compat_dt[] __initconst = {
2828
};
2929

3030
DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)")
31+
.smp_init = shmobile_smp_init_fallback_ops,
3132
.smp = smp_ops(r8a7790_smp_ops),
3233
.init_early = shmobile_init_delay,
3334
.init_time = rcar_gen2_timer_init,

‎arch/arm/mach-shmobile/setup-r8a7791.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,7 @@ static const char *const r8a7791_boards_compat_dt[] __initconst = {
2929
};
3030

3131
DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)")
32+
.smp_init = shmobile_smp_init_fallback_ops,
3233
.smp = smp_ops(r8a7791_smp_ops),
3334
.init_early = shmobile_init_delay,
3435
.init_time = rcar_gen2_timer_init,

‎arch/arm/mach-shmobile/setup-r8a7792.c

Lines changed: 35 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,35 @@
1+
/*
2+
* r8a7792 processor support
3+
*
4+
* Copyright (C) 2014 Renesas Electronics Corporation
5+
* Copyright (C) 2016 Cogent Embedded, Inc.
6+
*
7+
* This program is free software; you can redistribute it and/or modify
8+
* it under the terms of the GNU General Public License as published by
9+
* the Free Software Foundation; version 2 of the License.
10+
*
11+
* This program is distributed in the hope that it will be useful,
12+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
13+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14+
* GNU General Public License for more details.
15+
*/
16+
17+
#include <linux/of_platform.h>
18+
19+
#include <asm/mach/arch.h>
20+
21+
#include "common.h"
22+
#include "rcar-gen2.h"
23+
24+
static const char * const r8a7792_boards_compat_dt[] __initconst = {
25+
"renesas,r8a7792",
26+
NULL,
27+
};
28+
29+
DT_MACHINE_START(R8A7792_DT, "Generic R8A7792 (Flattened Device Tree)")
30+
.init_early = shmobile_init_delay,
31+
.init_late = shmobile_init_late,
32+
.init_time = rcar_gen2_timer_init,
33+
.reserve = rcar_gen2_reserve,
34+
.dt_compat = r8a7792_boards_compat_dt,
35+
MACHINE_END

‎arch/arm/mach-shmobile/setup-rcar-gen2.c

Lines changed: 24 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -46,6 +46,26 @@ u32 rcar_gen2_read_mode_pins(void)
4646
return mode;
4747
}
4848

49+
static unsigned int __init get_extal_freq(void)
50+
{
51+
struct device_node *cpg, *extal;
52+
u32 freq = 20000000;
53+
54+
cpg = of_find_compatible_node(NULL, NULL,
55+
"renesas,rcar-gen2-cpg-clocks");
56+
if (!cpg)
57+
return freq;
58+
59+
extal = of_parse_phandle(cpg, "clocks", 0);
60+
of_node_put(cpg);
61+
if (!extal)
62+
return freq;
63+
64+
of_property_read_u32(extal, "clock-frequency", &freq);
65+
of_node_put(extal);
66+
return freq;
67+
}
68+
4969
#define CNTCR 0
5070
#define CNTFID0 0x20
5171

@@ -54,10 +74,10 @@ void __init rcar_gen2_timer_init(void)
5474
u32 mode = rcar_gen2_read_mode_pins();
5575
#ifdef CONFIG_ARM_ARCH_TIMER
5676
void __iomem *base;
57-
int extal_mhz = 0;
5877
u32 freq;
5978

60-
if (of_machine_is_compatible("renesas,r8a7794")) {
79+
if (of_machine_is_compatible("renesas,r8a7792") ||
80+
of_machine_is_compatible("renesas,r8a7794")) {
6181
freq = 260000000 / 8; /* ZS / 8 */
6282
/* CNTVOFF has to be initialized either from non-secure
6383
* Hypervisor mode or secure Monitor mode with SCR.NS==1.
@@ -82,26 +102,9 @@ void __init rcar_gen2_timer_init(void)
82102
* with the counter disabled. Moreover, it may also report
83103
* a potentially incorrect fixed 13 MHz frequency. To be
84104
* correct these registers need to be updated to use the
85-
* frequency EXTAL / 2 which can be determined by the MD pins.
105+
* frequency EXTAL / 2.
86106
*/
87-
88-
switch (mode & (MD(14) | MD(13))) {
89-
case 0:
90-
extal_mhz = 15;
91-
break;
92-
case MD(13):
93-
extal_mhz = 20;
94-
break;
95-
case MD(14):
96-
extal_mhz = 26;
97-
break;
98-
case MD(13) | MD(14):
99-
extal_mhz = 30;
100-
break;
101-
}
102-
103-
/* The arch timer frequency equals EXTAL / 2 */
104-
freq = extal_mhz * (1000000 / 2);
107+
freq = get_extal_freq() / 2;
105108
}
106109

107110
/* Remap "armgcnt address map" space */

‎drivers/soc/renesas/Makefile

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,9 @@
11
obj-$(CONFIG_ARCH_R8A7779) += rcar-sysc.o r8a7779-sysc.o
22
obj-$(CONFIG_ARCH_R8A7790) += rcar-sysc.o r8a7790-sysc.o
33
obj-$(CONFIG_ARCH_R8A7791) += rcar-sysc.o r8a7791-sysc.o
4+
obj-$(CONFIG_ARCH_R8A7792) += rcar-sysc.o r8a7792-sysc.o
45
# R-Car M2-N is identical to R-Car M2-W w.r.t. power domains.
56
obj-$(CONFIG_ARCH_R8A7793) += rcar-sysc.o r8a7791-sysc.o
67
obj-$(CONFIG_ARCH_R8A7794) += rcar-sysc.o r8a7794-sysc.o
78
obj-$(CONFIG_ARCH_R8A7795) += rcar-sysc.o r8a7795-sysc.o
9+
obj-$(CONFIG_ARCH_R8A7796) += rcar-sysc.o r8a7796-sysc.o

‎drivers/soc/renesas/r8a7792-sysc.c

Lines changed: 34 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,34 @@
1+
/*
2+
* Renesas R-Car V2H (R8A7792) System Controller
3+
*
4+
* Copyright (C) 2016 Cogent Embedded Inc.
5+
*
6+
* This program is free software; you can redistribute it and/or modify
7+
* it under the terms of the GNU General Public License as published by
8+
* the Free Software Foundation; version 2 of the License.
9+
*/
10+
11+
#include <linux/bug.h>
12+
#include <linux/init.h>
13+
#include <linux/kernel.h>
14+
15+
#include <dt-bindings/power/r8a7792-sysc.h>
16+
17+
#include "rcar-sysc.h"
18+
19+
static const struct rcar_sysc_area r8a7792_areas[] __initconst = {
20+
{ "always-on", 0, 0, R8A7792_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
21+
{ "ca15-scu", 0x180, 0, R8A7792_PD_CA15_SCU, R8A7792_PD_ALWAYS_ON,
22+
PD_SCU },
23+
{ "ca15-cpu0", 0x40, 0, R8A7792_PD_CA15_CPU0, R8A7792_PD_CA15_SCU,
24+
PD_CPU_NOCR },
25+
{ "ca15-cpu1", 0x40, 1, R8A7792_PD_CA15_CPU1, R8A7792_PD_CA15_SCU,
26+
PD_CPU_NOCR },
27+
{ "sgx", 0xc0, 0, R8A7792_PD_SGX, R8A7792_PD_ALWAYS_ON },
28+
{ "imp", 0x140, 0, R8A7792_PD_IMP, R8A7792_PD_ALWAYS_ON },
29+
};
30+
31+
const struct rcar_sysc_info r8a7792_sysc_info __initconst = {
32+
.areas = r8a7792_areas,
33+
.num_areas = ARRAY_SIZE(r8a7792_areas),
34+
};

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