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mattropedanvet
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drm/i915: Move vblank evasion to commit (v4)
Move the vblank evasion up from the low-level, hw-specific update_plane() handlers to the general plane commit operation. Everything inside commit should now be non-sleeping, so this brings us closer to how vblank evasion will behave once we move over to atomic. v2: - Restore lost intel_crtc->active check on vblank evasion v3: - Replace assert_pipe_enabled() in intel_disable_primary_hw_plane() with an intel_crtc->active test; it turns out assert_pipe_enabled() grabs some mutexes and can sleep, which we can't do with interrupts disabled. v4: - Equivalent to v2; v3 change is now squashed into an earlier patch of the series. (Ander). Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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-42
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-42
lines changed

drivers/gpu/drm/i915/intel_display.c

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -11864,6 +11864,12 @@ static void intel_begin_crtc_commit(struct drm_crtc *crtc)
1186411864
intel_update_watermarks(crtc);
1186511865

1186611866
intel_runtime_pm_get(dev_priv);
11867+
11868+
/* Perform vblank evasion around commit operation */
11869+
if (intel_crtc->active)
11870+
intel_crtc->atomic.evade =
11871+
intel_pipe_update_start(intel_crtc,
11872+
&intel_crtc->atomic.start_vbl_count);
1186711873
}
1186811874

1186911875
static void intel_finish_crtc_commit(struct drm_crtc *crtc)
@@ -11873,6 +11879,10 @@ static void intel_finish_crtc_commit(struct drm_crtc *crtc)
1187311879
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1187411880
struct drm_plane *p;
1187511881

11882+
if (intel_crtc->atomic.evade)
11883+
intel_pipe_update_end(intel_crtc,
11884+
intel_crtc->atomic.start_vbl_count);
11885+
1187611886
intel_runtime_pm_put(dev_priv);
1187711887

1187811888
if (intel_crtc->atomic.wait_vblank)

drivers/gpu/drm/i915/intel_drv.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -428,6 +428,10 @@ struct skl_pipe_wm {
428428
* and thus can't be run with interrupts disabled.
429429
*/
430430
struct intel_crtc_atomic_commit {
431+
/* vblank evasion */
432+
bool evade;
433+
unsigned start_vbl_count;
434+
431435
/* Sleepable operations to perform before commit */
432436
bool wait_for_flips;
433437
bool disable_fbc;

drivers/gpu/drm/i915/intel_sprite.c

Lines changed: 0 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -412,8 +412,6 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_crtc *crtc,
412412
u32 sprctl;
413413
unsigned long sprsurf_offset, linear_offset;
414414
int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
415-
u32 start_vbl_count;
416-
bool atomic_update;
417415

418416
sprctl = I915_READ(SPCNTR(pipe, plane));
419417

@@ -502,8 +500,6 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_crtc *crtc,
502500
linear_offset += src_h * fb->pitches[0] + src_w * pixel_size;
503501
}
504502

505-
atomic_update = intel_pipe_update_start(intel_crtc, &start_vbl_count);
506-
507503
intel_update_primary_plane(intel_crtc);
508504

509505
if (IS_CHERRYVIEW(dev) && pipe == PIPE_B)
@@ -525,9 +521,6 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_crtc *crtc,
525521
sprsurf_offset);
526522

527523
intel_flush_primary_plane(dev_priv, intel_crtc->plane);
528-
529-
if (atomic_update)
530-
intel_pipe_update_end(intel_crtc, start_vbl_count);
531524
}
532525

533526
static void
@@ -539,10 +532,6 @@ vlv_disable_plane(struct drm_plane *dplane, struct drm_crtc *crtc)
539532
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
540533
int pipe = intel_plane->pipe;
541534
int plane = intel_plane->plane;
542-
u32 start_vbl_count;
543-
bool atomic_update;
544-
545-
atomic_update = intel_pipe_update_start(intel_crtc, &start_vbl_count);
546535

547536
intel_update_primary_plane(intel_crtc);
548537

@@ -553,9 +542,6 @@ vlv_disable_plane(struct drm_plane *dplane, struct drm_crtc *crtc)
553542

554543
intel_flush_primary_plane(dev_priv, intel_crtc->plane);
555544

556-
if (atomic_update)
557-
intel_pipe_update_end(intel_crtc, start_vbl_count);
558-
559545
intel_update_sprite_watermarks(dplane, crtc, 0, 0, 0, false, false);
560546
}
561547

@@ -626,8 +612,6 @@ ivb_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
626612
u32 sprctl, sprscale = 0;
627613
unsigned long sprsurf_offset, linear_offset;
628614
int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
629-
u32 start_vbl_count;
630-
bool atomic_update;
631615

632616
sprctl = I915_READ(SPRCTL(pipe));
633617

@@ -711,8 +695,6 @@ ivb_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
711695
}
712696
}
713697

714-
atomic_update = intel_pipe_update_start(intel_crtc, &start_vbl_count);
715-
716698
intel_update_primary_plane(intel_crtc);
717699

718700
I915_WRITE(SPRSTRIDE(pipe), fb->pitches[0]);
@@ -735,9 +717,6 @@ ivb_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
735717
i915_gem_obj_ggtt_offset(obj) + sprsurf_offset);
736718

737719
intel_flush_primary_plane(dev_priv, intel_crtc->plane);
738-
739-
if (atomic_update)
740-
intel_pipe_update_end(intel_crtc, start_vbl_count);
741720
}
742721

743722
static void
@@ -748,10 +727,6 @@ ivb_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc)
748727
struct intel_plane *intel_plane = to_intel_plane(plane);
749728
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
750729
int pipe = intel_plane->pipe;
751-
u32 start_vbl_count;
752-
bool atomic_update;
753-
754-
atomic_update = intel_pipe_update_start(intel_crtc, &start_vbl_count);
755730

756731
intel_update_primary_plane(intel_crtc);
757732

@@ -764,9 +739,6 @@ ivb_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc)
764739

765740
intel_flush_primary_plane(dev_priv, intel_crtc->plane);
766741

767-
if (atomic_update)
768-
intel_pipe_update_end(intel_crtc, start_vbl_count);
769-
770742
/*
771743
* Avoid underruns when disabling the sprite.
772744
* FIXME remove once watermark updates are done properly.
@@ -845,8 +817,6 @@ ilk_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
845817
unsigned long dvssurf_offset, linear_offset;
846818
u32 dvscntr, dvsscale;
847819
int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
848-
u32 start_vbl_count;
849-
bool atomic_update;
850820

851821
dvscntr = I915_READ(DVSCNTR(pipe));
852822

@@ -921,8 +891,6 @@ ilk_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
921891
linear_offset += src_h * fb->pitches[0] + src_w * pixel_size;
922892
}
923893

924-
atomic_update = intel_pipe_update_start(intel_crtc, &start_vbl_count);
925-
926894
intel_update_primary_plane(intel_crtc);
927895

928896
I915_WRITE(DVSSTRIDE(pipe), fb->pitches[0]);
@@ -940,9 +908,6 @@ ilk_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
940908
i915_gem_obj_ggtt_offset(obj) + dvssurf_offset);
941909

942910
intel_flush_primary_plane(dev_priv, intel_crtc->plane);
943-
944-
if (atomic_update)
945-
intel_pipe_update_end(intel_crtc, start_vbl_count);
946911
}
947912

948913
static void
@@ -953,10 +918,6 @@ ilk_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc)
953918
struct intel_plane *intel_plane = to_intel_plane(plane);
954919
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
955920
int pipe = intel_plane->pipe;
956-
u32 start_vbl_count;
957-
bool atomic_update;
958-
959-
atomic_update = intel_pipe_update_start(intel_crtc, &start_vbl_count);
960921

961922
intel_update_primary_plane(intel_crtc);
962923

@@ -968,9 +929,6 @@ ilk_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc)
968929

969930
intel_flush_primary_plane(dev_priv, intel_crtc->plane);
970931

971-
if (atomic_update)
972-
intel_pipe_update_end(intel_crtc, start_vbl_count);
973-
974932
/*
975933
* Avoid underruns when disabling the sprite.
976934
* FIXME remove once watermark updates are done properly.

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