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Merge tag 'drm-intel-next-fixes-2016-07-25' of git://anongit.freedesktop.org/drm-intel into drm-next
Bunch of fixes for the 4.8 merge pull, nothing out of the ordinary. All suitably marked up with cc: stable where needed. * tag 'drm-intel-next-fixes-2016-07-25' of git://anongit.freedesktop.org/drm-intel: drm/i915/gen9: Add WaInPlaceDecompressionHang drm/i915/guc: Revert "drm/i915/guc: enable GuC loading & submission by default" drm/i915/bxt: Fix inadvertent CPU snooping due to incorrect MOCS config drm/i915/gen9: Clean up MOCS table definitions drm/i915: Set legacy properties when using legacy gamma set IOCTL. (v2) drm/i915: Enable polling when we don't have hpd drm/i915/vlv: Disable HPD in valleyview_crt_detect_hotplug() drm/i915/vlv: Reset the ADPA in vlv_display_power_well_init() drm/i915/vlv: Make intel_crt_reset() per-encoder drm/i915: Unbreak interrupts on pre-gen6 drm/i915/breadcrumbs: Queue hangcheck before sleeping
2 parents 9af07af + f15f6ca commit c3f8d86

13 files changed

+286
-60
lines changed

‎drivers/gpu/drm/i915/i915_drv.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2413,6 +2413,9 @@ static int intel_runtime_suspend(struct device *device)
24132413

24142414
assert_forcewakes_inactive(dev_priv);
24152415

2416+
if (!IS_VALLEYVIEW(dev_priv) || !IS_CHERRYVIEW(dev_priv))
2417+
intel_hpd_poll_init(dev_priv);
2418+
24162419
DRM_DEBUG_KMS("Device suspended\n");
24172420
return 0;
24182421
}

‎drivers/gpu/drm/i915/i915_drv.h

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -284,6 +284,9 @@ struct i915_hotplug {
284284
u32 short_port_mask;
285285
struct work_struct dig_port_work;
286286

287+
struct work_struct poll_init_work;
288+
bool poll_enabled;
289+
287290
/*
288291
* if we get a HPD irq from DP and a HPD irq from non-DP
289292
* the non-DP HPD could block the workqueue on a mode config
@@ -2743,6 +2746,8 @@ struct drm_i915_cmd_table {
27432746
#define SKL_REVID_D0 0x3
27442747
#define SKL_REVID_E0 0x4
27452748
#define SKL_REVID_F0 0x5
2749+
#define SKL_REVID_G0 0x6
2750+
#define SKL_REVID_H0 0x7
27462751

27472752
#define IS_SKL_REVID(p, since, until) (IS_SKYLAKE(p) && IS_REVID(p, since, until))
27482753

@@ -2957,6 +2962,8 @@ void intel_hpd_init(struct drm_i915_private *dev_priv);
29572962
void intel_hpd_init_work(struct drm_i915_private *dev_priv);
29582963
void intel_hpd_cancel_work(struct drm_i915_private *dev_priv);
29592964
bool intel_hpd_pin_to_port(enum hpd_pin pin, enum port *port);
2965+
bool intel_hpd_disable(struct drm_i915_private *dev_priv, enum hpd_pin pin);
2966+
void intel_hpd_enable(struct drm_i915_private *dev_priv, enum hpd_pin pin);
29602967

29612968
/* i915_irq.c */
29622969
static inline void i915_queue_hangcheck(struct drm_i915_private *dev_priv)

‎drivers/gpu/drm/i915/i915_gem.c

Lines changed: 0 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1501,15 +1501,6 @@ int __i915_wait_request(struct drm_i915_gem_request *req,
15011501
break;
15021502
}
15031503

1504-
/* Ensure that even if the GPU hangs, we get woken up.
1505-
*
1506-
* However, note that if no one is waiting, we never notice
1507-
* a gpu hang. Eventually, we will have to wait for a resource
1508-
* held by the GPU and so trigger a hangcheck. In the most
1509-
* pathological case, this will be upon memory starvation!
1510-
*/
1511-
i915_queue_hangcheck(req->i915);
1512-
15131504
timeout_remain = io_schedule_timeout(timeout_remain);
15141505
if (timeout_remain == 0) {
15151506
ret = -ETIME;

‎drivers/gpu/drm/i915/i915_params.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -54,8 +54,8 @@ struct i915_params i915 __read_mostly = {
5454
.verbose_state_checks = 1,
5555
.nuclear_pageflip = 0,
5656
.edp_vswing = 0,
57-
.enable_guc_loading = -1,
58-
.enable_guc_submission = -1,
57+
.enable_guc_loading = 0,
58+
.enable_guc_submission = 0,
5959
.guc_log_level = -1,
6060
.enable_dp_mst = true,
6161
.inject_load_failure = 0,
@@ -203,12 +203,12 @@ MODULE_PARM_DESC(edp_vswing,
203203
module_param_named_unsafe(enable_guc_loading, i915.enable_guc_loading, int, 0400);
204204
MODULE_PARM_DESC(enable_guc_loading,
205205
"Enable GuC firmware loading "
206-
"(-1=auto [default], 0=never, 1=if available, 2=required)");
206+
"(-1=auto, 0=never [default], 1=if available, 2=required)");
207207

208208
module_param_named_unsafe(enable_guc_submission, i915.enable_guc_submission, int, 0400);
209209
MODULE_PARM_DESC(enable_guc_submission,
210210
"Enable GuC submission "
211-
"(-1=auto [default], 0=never, 1=if available, 2=required)");
211+
"(-1=auto, 0=never [default], 1=if available, 2=required)");
212212

213213
module_param_named(guc_log_level, i915.guc_log_level, int, 0400);
214214
MODULE_PARM_DESC(guc_log_level,

‎drivers/gpu/drm/i915/i915_reg.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1686,6 +1686,9 @@ enum skl_disp_power_wells {
16861686

16871687
#define GEN7_TLB_RD_ADDR _MMIO(0x4700)
16881688

1689+
#define GEN9_GAMT_ECO_REG_RW_IA _MMIO(0x4ab0)
1690+
#define GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS (1<<18)
1691+
16891692
#define GAMT_CHKN_BIT_REG _MMIO(0x4ab8)
16901693
#define GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING (1<<28)
16911694

‎drivers/gpu/drm/i915/intel_breadcrumbs.c

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -93,6 +93,15 @@ static void __intel_breadcrumbs_enable_irq(struct intel_breadcrumbs *b)
9393
if (!b->irq_enabled ||
9494
test_bit(engine->id, &i915->gpu_error.missed_irq_rings))
9595
mod_timer(&b->fake_irq, jiffies + 1);
96+
97+
/* Ensure that even if the GPU hangs, we get woken up.
98+
*
99+
* However, note that if no one is waiting, we never notice
100+
* a gpu hang. Eventually, we will have to wait for a resource
101+
* held by the GPU and so trigger a hangcheck. In the most
102+
* pathological case, this will be upon memory starvation!
103+
*/
104+
i915_queue_hangcheck(i915);
96105
}
97106

98107
static void __intel_breadcrumbs_disable_irq(struct intel_breadcrumbs *b)

‎drivers/gpu/drm/i915/intel_crt.c

Lines changed: 23 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -329,10 +329,25 @@ static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
329329
struct drm_device *dev = connector->dev;
330330
struct intel_crt *crt = intel_attached_crt(connector);
331331
struct drm_i915_private *dev_priv = to_i915(dev);
332+
bool reenable_hpd;
332333
u32 adpa;
333334
bool ret;
334335
u32 save_adpa;
335336

337+
/*
338+
* Doing a force trigger causes a hpd interrupt to get sent, which can
339+
* get us stuck in a loop if we're polling:
340+
* - We enable power wells and reset the ADPA
341+
* - output_poll_exec does force probe on VGA, triggering a hpd
342+
* - HPD handler waits for poll to unlock dev->mode_config.mutex
343+
* - output_poll_exec shuts off the ADPA, unlocks
344+
* dev->mode_config.mutex
345+
* - HPD handler runs, resets ADPA and brings us back to the start
346+
*
347+
* Just disable HPD interrupts here to prevent this
348+
*/
349+
reenable_hpd = intel_hpd_disable(dev_priv, crt->base.hpd_pin);
350+
336351
save_adpa = adpa = I915_READ(crt->adpa_reg);
337352
DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
338353

@@ -357,6 +372,9 @@ static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
357372

358373
DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
359374

375+
if (reenable_hpd)
376+
intel_hpd_enable(dev_priv, crt->base.hpd_pin);
377+
360378
return ret;
361379
}
362380

@@ -717,11 +735,11 @@ static int intel_crt_set_property(struct drm_connector *connector,
717735
return 0;
718736
}
719737

720-
static void intel_crt_reset(struct drm_connector *connector)
738+
void intel_crt_reset(struct drm_encoder *encoder)
721739
{
722-
struct drm_device *dev = connector->dev;
740+
struct drm_device *dev = encoder->dev;
723741
struct drm_i915_private *dev_priv = to_i915(dev);
724-
struct intel_crt *crt = intel_attached_crt(connector);
742+
struct intel_crt *crt = intel_encoder_to_crt(to_intel_encoder(encoder));
725743

726744
if (INTEL_INFO(dev)->gen >= 5) {
727745
u32 adpa;
@@ -743,7 +761,6 @@ static void intel_crt_reset(struct drm_connector *connector)
743761
*/
744762

745763
static const struct drm_connector_funcs intel_crt_connector_funcs = {
746-
.reset = intel_crt_reset,
747764
.dpms = drm_atomic_helper_connector_dpms,
748765
.detect = intel_crt_detect,
749766
.fill_modes = drm_helper_probe_single_connector_modes,
@@ -762,6 +779,7 @@ static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs
762779
};
763780

764781
static const struct drm_encoder_funcs intel_crt_enc_funcs = {
782+
.reset = intel_crt_reset,
765783
.destroy = intel_encoder_destroy,
766784
};
767785

@@ -904,5 +922,5 @@ void intel_crt_init(struct drm_device *dev)
904922
dev_priv->fdi_rx_config = I915_READ(FDI_RX_CTL(PIPE_A)) & fdi_config;
905923
}
906924

907-
intel_crt_reset(connector);
925+
intel_crt_reset(&crt->base.base);
908926
}

‎drivers/gpu/drm/i915/intel_display.c

Lines changed: 43 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13924,8 +13924,50 @@ void intel_crtc_restore_mode(struct drm_crtc *crtc)
1392413924

1392513925
#undef for_each_intel_crtc_masked
1392613926

13927+
/*
13928+
* FIXME: Remove this once i915 is fully DRIVER_ATOMIC by calling
13929+
* drm_atomic_helper_legacy_gamma_set() directly.
13930+
*/
13931+
static int intel_atomic_legacy_gamma_set(struct drm_crtc *crtc,
13932+
u16 *red, u16 *green, u16 *blue,
13933+
uint32_t size)
13934+
{
13935+
struct drm_device *dev = crtc->dev;
13936+
struct drm_mode_config *config = &dev->mode_config;
13937+
struct drm_crtc_state *state;
13938+
int ret;
13939+
13940+
ret = drm_atomic_helper_legacy_gamma_set(crtc, red, green, blue, size);
13941+
if (ret)
13942+
return ret;
13943+
13944+
/*
13945+
* Make sure we update the legacy properties so this works when
13946+
* atomic is not enabled.
13947+
*/
13948+
13949+
state = crtc->state;
13950+
13951+
drm_object_property_set_value(&crtc->base,
13952+
config->degamma_lut_property,
13953+
(state->degamma_lut) ?
13954+
state->degamma_lut->base.id : 0);
13955+
13956+
drm_object_property_set_value(&crtc->base,
13957+
config->ctm_property,
13958+
(state->ctm) ?
13959+
state->ctm->base.id : 0);
13960+
13961+
drm_object_property_set_value(&crtc->base,
13962+
config->gamma_lut_property,
13963+
(state->gamma_lut) ?
13964+
state->gamma_lut->base.id : 0);
13965+
13966+
return 0;
13967+
}
13968+
1392713969
static const struct drm_crtc_funcs intel_crtc_funcs = {
13928-
.gamma_set = drm_atomic_helper_legacy_gamma_set,
13970+
.gamma_set = intel_atomic_legacy_gamma_set,
1392913971
.set_config = drm_atomic_helper_set_config,
1393013972
.set_property = drm_atomic_helper_crtc_set_property,
1393113973
.destroy = intel_crtc_destroy,

‎drivers/gpu/drm/i915/intel_drv.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1102,7 +1102,7 @@ void gen8_irq_power_well_pre_disable(struct drm_i915_private *dev_priv,
11021102

11031103
/* intel_crt.c */
11041104
void intel_crt_init(struct drm_device *dev);
1105-
1105+
void intel_crt_reset(struct drm_encoder *encoder);
11061106

11071107
/* intel_ddi.c */
11081108
void intel_ddi_clk_select(struct intel_encoder *encoder,
@@ -1425,6 +1425,8 @@ int intel_dsi_dcs_init_backlight_funcs(struct intel_connector *intel_connector);
14251425

14261426
/* intel_dvo.c */
14271427
void intel_dvo_init(struct drm_device *dev);
1428+
/* intel_hotplug.c */
1429+
void intel_hpd_poll_init(struct drm_i915_private *dev_priv);
14281430

14291431

14301432
/* legacy fbdev emulation in intel_fbdev.c */

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