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Merge tag 'lpc32xx-soc-for-5.1' of https://github.com/vzapolskiy/linux-lpc32xx into arm/fixes
ARM: lpc32xx: platform updates for v5.1 Here are the changes for ARM NXP LPC32xx platform files: * removed a superfluous record to kernel log buffer under OOM condition, * use kmemdup() helper instead of kmalloc()/memcpy() pair, * removed platform data of ARM PL180 SD/MMC and ARM PL111 LCD controllers, since now both are handled in devicetree files. * tag 'lpc32xx-soc-for-5.1' of https://github.com/vzapolskiy/linux-lpc32xx: ARM: lpc32xx: remove platform data of ARM PL111 LCD controller ARM: lpc32xx: remove platform data of ARM PL180 SD/MMC controller ARM: lpc32xx: Use kmemdup to replace duplicating its implementation ARM: lpc32xx: Delete an error message for a failed memory allocation in lpc32xx_pm_enter() Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 parents 919c1d4 + 49bb0b9 commit c47cd74

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arch/arm/mach-lpc32xx/phy3250.c

Lines changed: 0 additions & 84 deletions
Original file line numberDiff line numberDiff line change
@@ -45,73 +45,6 @@
4545
#include <mach/board.h>
4646
#include "common.h"
4747

48-
/*
49-
* AMBA LCD controller
50-
*/
51-
static struct clcd_panel conn_lcd_panel = {
52-
.mode = {
53-
.name = "QVGA portrait",
54-
.refresh = 60,
55-
.xres = 240,
56-
.yres = 320,
57-
.pixclock = 191828,
58-
.left_margin = 22,
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.right_margin = 11,
60-
.upper_margin = 2,
61-
.lower_margin = 1,
62-
.hsync_len = 5,
63-
.vsync_len = 2,
64-
.sync = 0,
65-
.vmode = FB_VMODE_NONINTERLACED,
66-
},
67-
.width = -1,
68-
.height = -1,
69-
.tim2 = (TIM2_IVS | TIM2_IHS),
70-
.cntl = (CNTL_BGR | CNTL_LCDTFT | CNTL_LCDVCOMP(1) |
71-
CNTL_LCDBPP16_565),
72-
.bpp = 16,
73-
};
74-
#define PANEL_SIZE (3 * SZ_64K)
75-
76-
static int lpc32xx_clcd_setup(struct clcd_fb *fb)
77-
{
78-
dma_addr_t dma;
79-
80-
fb->fb.screen_base = dma_alloc_wc(&fb->dev->dev, PANEL_SIZE, &dma,
81-
GFP_KERNEL);
82-
if (!fb->fb.screen_base) {
83-
printk(KERN_ERR "CLCD: unable to map framebuffer\n");
84-
return -ENOMEM;
85-
}
86-
87-
fb->fb.fix.smem_start = dma;
88-
fb->fb.fix.smem_len = PANEL_SIZE;
89-
fb->panel = &conn_lcd_panel;
90-
91-
return 0;
92-
}
93-
94-
static int lpc32xx_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
95-
{
96-
return dma_mmap_wc(&fb->dev->dev, vma, fb->fb.screen_base,
97-
fb->fb.fix.smem_start, fb->fb.fix.smem_len);
98-
}
99-
100-
static void lpc32xx_clcd_remove(struct clcd_fb *fb)
101-
{
102-
dma_free_wc(&fb->dev->dev, fb->fb.fix.smem_len, fb->fb.screen_base,
103-
fb->fb.fix.smem_start);
104-
}
105-
106-
static struct clcd_board lpc32xx_clcd_data = {
107-
.name = "Phytec LCD",
108-
.check = clcdfb_check,
109-
.decode = clcdfb_decode,
110-
.setup = lpc32xx_clcd_setup,
111-
.mmap = lpc32xx_clcd_mmap,
112-
.remove = lpc32xx_clcd_remove,
113-
};
114-
11548
static struct pl08x_channel_data pl08x_slave_channels[] = {
11649
{
11750
.bus_id = "nand-slc",
@@ -148,11 +81,6 @@ static struct pl08x_platform_data pl08x_pd = {
14881
.mem_buses = PL08X_AHB1,
14982
};
15083

151-
static struct mmci_platform_data lpc32xx_mmci_data = {
152-
.ocr_mask = MMC_VDD_30_31 | MMC_VDD_31_32 |
153-
MMC_VDD_32_33 | MMC_VDD_33_34,
154-
};
155-
15684
static struct lpc32xx_slc_platform_data lpc32xx_slc_data = {
15785
.dma_filter = pl08x_filter_id,
15886
};
@@ -164,10 +92,7 @@ static struct lpc32xx_mlc_platform_data lpc32xx_mlc_data = {
16492
static const struct of_dev_auxdata lpc32xx_auxdata_lookup[] __initconst = {
16593
OF_DEV_AUXDATA("arm,pl022", 0x20084000, "dev:ssp0", NULL),
16694
OF_DEV_AUXDATA("arm,pl022", 0x2008C000, "dev:ssp1", NULL),
167-
OF_DEV_AUXDATA("arm,pl110", 0x31040000, "dev:clcd", &lpc32xx_clcd_data),
16895
OF_DEV_AUXDATA("arm,pl080", 0x31000000, "pl08xdmac", &pl08x_pd),
169-
OF_DEV_AUXDATA("arm,pl18x", 0x20098000, "20098000.sd",
170-
&lpc32xx_mmci_data),
17196
OF_DEV_AUXDATA("nxp,lpc3220-slc", 0x20020000, "20020000.flash",
17297
&lpc32xx_slc_data),
17398
OF_DEV_AUXDATA("nxp,lpc3220-mlc", 0x200a8000, "200a8000.flash",
@@ -177,15 +102,6 @@ static const struct of_dev_auxdata lpc32xx_auxdata_lookup[] __initconst = {
177102

178103
static void __init lpc3250_machine_init(void)
179104
{
180-
u32 tmp;
181-
182-
/* Setup LCD muxing to RGB565 */
183-
tmp = __raw_readl(LPC32XX_CLKPWR_LCDCLK_CTRL) &
184-
~(LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_MSK |
185-
LPC32XX_CLKPWR_LCDCTRL_PSCALE_MSK);
186-
tmp |= LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_TFT16;
187-
__raw_writel(tmp, LPC32XX_CLKPWR_LCDCLK_CTRL);
188-
189105
lpc32xx_serial_init();
190106

191107
/* Test clock needed for UDA1380 initial init */

arch/arm/mach-lpc32xx/pm.c

Lines changed: 3 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -86,17 +86,10 @@ static int lpc32xx_pm_enter(suspend_state_t state)
8686
void *iram_swap_area;
8787

8888
/* Allocate some space for temporary IRAM storage */
89-
iram_swap_area = kmalloc(lpc32xx_sys_suspend_sz, GFP_KERNEL);
90-
if (!iram_swap_area) {
91-
printk(KERN_ERR
92-
"PM Suspend: cannot allocate memory to save portion "
93-
"of SRAM\n");
89+
iram_swap_area = kmemdup((void *)TEMP_IRAM_AREA,
90+
lpc32xx_sys_suspend_sz, GFP_KERNEL);
91+
if (!iram_swap_area)
9492
return -ENOMEM;
95-
}
96-
97-
/* Backup a small area of IRAM used for the suspend code */
98-
memcpy(iram_swap_area, (void *) TEMP_IRAM_AREA,
99-
lpc32xx_sys_suspend_sz);
10093

10194
/*
10295
* Copy code to suspend system into IRAM. The suspend code

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