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Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie: "Not a huge amount happening, some MAINTAINERS updates, radeon, vmwgfx and tegra fixes" * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: drm/vmwgfx: avoid null pointer dereference at failure paths drm/vmwgfx: Make sure backing mobs are cleared when allocated. Update driver date. drm/vmwgfx: Remove some unused surface formats drm/radeon: enable speaker allocation setup on dce3.2 drm/radeon: change audio enable logic drm/radeon: fix audio disable on dce6+ drm/radeon: free uvd ring on unload drm/radeon: disable pll sharing for DP on DCE4.1 drm/radeon: fix missing bo reservation drm/radeon: print the supported atpx function mask MAINTAINERS: update drm git tree entry MAINTAINERS: add entry for drm radeon driver drm/tegra: Add guard to avoid double disable/enable of RGB outputs gpu: host1x: do not check previously handled gathers drm/tegra: fix typo 'CONFIG_TEGRA_DRM_FBDEV'
2 parents a53c8ce + d668ca1 commit c59224d

19 files changed

+118
-63
lines changed

‎MAINTAINERS

Lines changed: 11 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2848,12 +2848,22 @@ F: lib/kobj*
28482848
DRM DRIVERS
28492849
M: David Airlie <airlied@linux.ie>
28502850
L: dri-devel@lists.freedesktop.org
2851-
T: git git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6.git
2851+
T: git git://people.freedesktop.org/~airlied/linux
28522852
S: Maintained
28532853
F: drivers/gpu/drm/
28542854
F: include/drm/
28552855
F: include/uapi/drm/
28562856

2857+
RADEON DRM DRIVERS
2858+
M: Alex Deucher <alexander.deucher@amd.com>
2859+
M: Christian König <christian.koenig@amd.com>
2860+
L: dri-devel@lists.freedesktop.org
2861+
T: git git://people.freedesktop.org/~agd5f/linux
2862+
S: Supported
2863+
F: drivers/gpu/drm/radeon/
2864+
F: include/drm/radeon*
2865+
F: include/uapi/drm/radeon*
2866+
28572867
INTEL DRM DRIVERS (excluding Poulsbo, Moorestown and derivative chipsets)
28582868
M: Daniel Vetter <daniel.vetter@ffwll.ch>
28592869
M: Jani Nikula <jani.nikula@linux.intel.com>

‎drivers/gpu/drm/radeon/atombios_crtc.c

Lines changed: 15 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1774,6 +1774,20 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc)
17741774
return ATOM_PPLL1;
17751775
DRM_ERROR("unable to allocate a PPLL\n");
17761776
return ATOM_PPLL_INVALID;
1777+
} else if (ASIC_IS_DCE41(rdev)) {
1778+
/* Don't share PLLs on DCE4.1 chips */
1779+
if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(radeon_crtc->encoder))) {
1780+
if (rdev->clock.dp_extclk)
1781+
/* skip PPLL programming if using ext clock */
1782+
return ATOM_PPLL_INVALID;
1783+
}
1784+
pll_in_use = radeon_get_pll_use_mask(crtc);
1785+
if (!(pll_in_use & (1 << ATOM_PPLL1)))
1786+
return ATOM_PPLL1;
1787+
if (!(pll_in_use & (1 << ATOM_PPLL2)))
1788+
return ATOM_PPLL2;
1789+
DRM_ERROR("unable to allocate a PPLL\n");
1790+
return ATOM_PPLL_INVALID;
17771791
} else if (ASIC_IS_DCE4(rdev)) {
17781792
/* in DP mode, the DP ref clock can come from PPLL, DCPLL, or ext clock,
17791793
* depending on the asic:
@@ -1801,7 +1815,7 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc)
18011815
if (pll != ATOM_PPLL_INVALID)
18021816
return pll;
18031817
}
1804-
} else if (!ASIC_IS_DCE41(rdev)) { /* Don't share PLLs on DCE4.1 chips */
1818+
} else {
18051819
/* use the same PPLL for all monitors with the same clock */
18061820
pll = radeon_get_shared_nondp_ppll(crtc);
18071821
if (pll != ATOM_PPLL_INVALID)

‎drivers/gpu/drm/radeon/dce6_afmt.c

Lines changed: 9 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -278,13 +278,15 @@ static int dce6_audio_chipset_supported(struct radeon_device *rdev)
278278
return !ASIC_IS_NODCE(rdev);
279279
}
280280

281-
static void dce6_audio_enable(struct radeon_device *rdev,
282-
struct r600_audio_pin *pin,
283-
bool enable)
281+
void dce6_audio_enable(struct radeon_device *rdev,
282+
struct r600_audio_pin *pin,
283+
bool enable)
284284
{
285+
if (!pin)
286+
return;
287+
285288
WREG32_ENDPOINT(pin->offset, AZ_F0_CODEC_PIN_CONTROL_HOTPLUG_CONTROL,
286-
AUDIO_ENABLED);
287-
DRM_INFO("%s audio %d support\n", enable ? "Enabling" : "Disabling", pin->id);
289+
enable ? AUDIO_ENABLED : 0);
288290
}
289291

290292
static const u32 pin_offsets[7] =
@@ -323,7 +325,8 @@ int dce6_audio_init(struct radeon_device *rdev)
323325
rdev->audio.pin[i].connected = false;
324326
rdev->audio.pin[i].offset = pin_offsets[i];
325327
rdev->audio.pin[i].id = i;
326-
dce6_audio_enable(rdev, &rdev->audio.pin[i], true);
328+
/* disable audio. it will be set up later */
329+
dce6_audio_enable(rdev, &rdev->audio.pin[i], false);
327330
}
328331

329332
return 0;

‎drivers/gpu/drm/radeon/evergreen.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5475,9 +5475,9 @@ void evergreen_fini(struct radeon_device *rdev)
54755475
radeon_wb_fini(rdev);
54765476
radeon_ib_pool_fini(rdev);
54775477
radeon_irq_kms_fini(rdev);
5478-
evergreen_pcie_gart_fini(rdev);
54795478
uvd_v1_0_fini(rdev);
54805479
radeon_uvd_fini(rdev);
5480+
evergreen_pcie_gart_fini(rdev);
54815481
r600_vram_scratch_fini(rdev);
54825482
radeon_gem_fini(rdev);
54835483
radeon_fence_driver_fini(rdev);

‎drivers/gpu/drm/radeon/evergreen_hdmi.c

Lines changed: 15 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -306,6 +306,15 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode
306306
return;
307307
offset = dig->afmt->offset;
308308

309+
/* disable audio prior to setting up hw */
310+
if (ASIC_IS_DCE6(rdev)) {
311+
dig->afmt->pin = dce6_audio_get_pin(rdev);
312+
dce6_audio_enable(rdev, dig->afmt->pin, false);
313+
} else {
314+
dig->afmt->pin = r600_audio_get_pin(rdev);
315+
r600_audio_enable(rdev, dig->afmt->pin, false);
316+
}
317+
309318
evergreen_audio_set_dto(encoder, mode->clock);
310319

311320
WREG32(HDMI_VBI_PACKET_CONTROL + offset,
@@ -409,12 +418,16 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode
409418
WREG32(AFMT_RAMP_CONTROL1 + offset, 0x007FFFFF);
410419
WREG32(AFMT_RAMP_CONTROL2 + offset, 0x00000001);
411420
WREG32(AFMT_RAMP_CONTROL3 + offset, 0x00000001);
421+
422+
/* enable audio after to setting up hw */
423+
if (ASIC_IS_DCE6(rdev))
424+
dce6_audio_enable(rdev, dig->afmt->pin, true);
425+
else
426+
r600_audio_enable(rdev, dig->afmt->pin, true);
412427
}
413428

414429
void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable)
415430
{
416-
struct drm_device *dev = encoder->dev;
417-
struct radeon_device *rdev = dev->dev_private;
418431
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
419432
struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
420433

@@ -427,15 +440,6 @@ void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable)
427440
if (!enable && !dig->afmt->enabled)
428441
return;
429442

430-
if (enable) {
431-
if (ASIC_IS_DCE6(rdev))
432-
dig->afmt->pin = dce6_audio_get_pin(rdev);
433-
else
434-
dig->afmt->pin = r600_audio_get_pin(rdev);
435-
} else {
436-
dig->afmt->pin = NULL;
437-
}
438-
439443
dig->afmt->enabled = enable;
440444

441445
DRM_DEBUG("%sabling HDMI interface @ 0x%04X for encoder 0x%x\n",

‎drivers/gpu/drm/radeon/r600_audio.c

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -142,12 +142,15 @@ void r600_audio_update_hdmi(struct work_struct *work)
142142
}
143143

144144
/* enable the audio stream */
145-
static void r600_audio_enable(struct radeon_device *rdev,
146-
struct r600_audio_pin *pin,
147-
bool enable)
145+
void r600_audio_enable(struct radeon_device *rdev,
146+
struct r600_audio_pin *pin,
147+
bool enable)
148148
{
149149
u32 value = 0;
150150

151+
if (!pin)
152+
return;
153+
151154
if (ASIC_IS_DCE4(rdev)) {
152155
if (enable) {
153156
value |= 0x81000000; /* Required to enable audio */
@@ -158,7 +161,6 @@ static void r600_audio_enable(struct radeon_device *rdev,
158161
WREG32_P(R600_AUDIO_ENABLE,
159162
enable ? 0x81000000 : 0x0, ~0x81000000);
160163
}
161-
DRM_INFO("%s audio %d support\n", enable ? "Enabling" : "Disabling", pin->id);
162164
}
163165

164166
/*
@@ -178,8 +180,8 @@ int r600_audio_init(struct radeon_device *rdev)
178180
rdev->audio.pin[0].status_bits = 0;
179181
rdev->audio.pin[0].category_code = 0;
180182
rdev->audio.pin[0].id = 0;
181-
182-
r600_audio_enable(rdev, &rdev->audio.pin[0], true);
183+
/* disable audio. it will be set up later */
184+
r600_audio_enable(rdev, &rdev->audio.pin[0], false);
183185

184186
return 0;
185187
}

‎drivers/gpu/drm/radeon/r600_hdmi.c

Lines changed: 7 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -329,9 +329,6 @@ static void dce3_2_afmt_write_speaker_allocation(struct drm_encoder *encoder)
329329
u8 *sadb;
330330
int sad_count;
331331

332-
/* XXX: setting this register causes hangs on some asics */
333-
return;
334-
335332
list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) {
336333
if (connector->encoder == encoder) {
337334
radeon_connector = to_radeon_connector(connector);
@@ -460,6 +457,10 @@ void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mod
460457
return;
461458
offset = dig->afmt->offset;
462459

460+
/* disable audio prior to setting up hw */
461+
dig->afmt->pin = r600_audio_get_pin(rdev);
462+
r600_audio_enable(rdev, dig->afmt->pin, false);
463+
463464
r600_audio_set_dto(encoder, mode->clock);
464465

465466
WREG32(HDMI0_VBI_PACKET_CONTROL + offset,
@@ -531,6 +532,9 @@ void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mod
531532
WREG32(HDMI0_RAMP_CONTROL3 + offset, 0x00000001);
532533

533534
r600_hdmi_audio_workaround(encoder);
535+
536+
/* enable audio after to setting up hw */
537+
r600_audio_enable(rdev, dig->afmt->pin, true);
534538
}
535539

536540
/*
@@ -651,11 +655,6 @@ void r600_hdmi_enable(struct drm_encoder *encoder, bool enable)
651655
if (!enable && !dig->afmt->enabled)
652656
return;
653657

654-
if (enable)
655-
dig->afmt->pin = r600_audio_get_pin(rdev);
656-
else
657-
dig->afmt->pin = NULL;
658-
659658
/* Older chipsets require setting HDMI and routing manually */
660659
if (!ASIC_IS_DCE3(rdev)) {
661660
if (enable)

‎drivers/gpu/drm/radeon/radeon.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2747,6 +2747,12 @@ int radeon_vm_bo_rmv(struct radeon_device *rdev,
27472747
void r600_audio_update_hdmi(struct work_struct *work);
27482748
struct r600_audio_pin *r600_audio_get_pin(struct radeon_device *rdev);
27492749
struct r600_audio_pin *dce6_audio_get_pin(struct radeon_device *rdev);
2750+
void r600_audio_enable(struct radeon_device *rdev,
2751+
struct r600_audio_pin *pin,
2752+
bool enable);
2753+
void dce6_audio_enable(struct radeon_device *rdev,
2754+
struct r600_audio_pin *pin,
2755+
bool enable);
27502756

27512757
/*
27522758
* R600 vram scratch functions

‎drivers/gpu/drm/radeon/radeon_atpx_handler.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -219,7 +219,8 @@ static int radeon_atpx_verify_interface(struct radeon_atpx *atpx)
219219
memcpy(&output, info->buffer.pointer, size);
220220

221221
/* TODO: check version? */
222-
printk("ATPX version %u\n", output.version);
222+
printk("ATPX version %u, functions 0x%08x\n",
223+
output.version, output.function_bits);
223224

224225
radeon_atpx_parse_functions(&atpx->functions, output.function_bits);
225226

‎drivers/gpu/drm/radeon/radeon_kms.c

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -537,13 +537,19 @@ int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv)
537537

538538
radeon_vm_init(rdev, &fpriv->vm);
539539

540+
r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false);
541+
if (r)
542+
return r;
543+
540544
/* map the ib pool buffer read only into
541545
* virtual address space */
542546
bo_va = radeon_vm_bo_add(rdev, &fpriv->vm,
543547
rdev->ring_tmp_bo.bo);
544548
r = radeon_vm_bo_set_addr(rdev, bo_va, RADEON_VA_IB_OFFSET,
545549
RADEON_VM_PAGE_READABLE |
546550
RADEON_VM_PAGE_SNOOPED);
551+
552+
radeon_bo_unreserve(rdev->ring_tmp_bo.bo);
547553
if (r) {
548554
radeon_vm_fini(rdev, &fpriv->vm);
549555
kfree(fpriv);

‎drivers/gpu/drm/radeon/radeon_uvd.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -171,6 +171,8 @@ void radeon_uvd_fini(struct radeon_device *rdev)
171171

172172
radeon_bo_unref(&rdev->uvd.vcpu_bo);
173173

174+
radeon_ring_fini(rdev, &rdev->ring[R600_RING_TYPE_UVD_INDEX]);
175+
174176
release_firmware(rdev->uvd_fw);
175177
}
176178

‎drivers/gpu/drm/radeon/rv770.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1955,9 +1955,9 @@ void rv770_fini(struct radeon_device *rdev)
19551955
radeon_wb_fini(rdev);
19561956
radeon_ib_pool_fini(rdev);
19571957
radeon_irq_kms_fini(rdev);
1958-
rv770_pcie_gart_fini(rdev);
19591958
uvd_v1_0_fini(rdev);
19601959
radeon_uvd_fini(rdev);
1960+
rv770_pcie_gart_fini(rdev);
19611961
r600_vram_scratch_fini(rdev);
19621962
radeon_gem_fini(rdev);
19631963
radeon_fence_driver_fini(rdev);

‎drivers/gpu/drm/tegra/drm.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -104,7 +104,7 @@ static void tegra_drm_context_free(struct tegra_drm_context *context)
104104

105105
static void tegra_drm_lastclose(struct drm_device *drm)
106106
{
107-
#ifdef CONFIG_TEGRA_DRM_FBDEV
107+
#ifdef CONFIG_DRM_TEGRA_FBDEV
108108
struct tegra_drm *tegra = drm->dev_private;
109109

110110
tegra_fbdev_restore_mode(tegra->fbdev);

‎drivers/gpu/drm/tegra/rgb.c

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,7 @@
1515
struct tegra_rgb {
1616
struct tegra_output output;
1717
struct tegra_dc *dc;
18+
bool enabled;
1819

1920
struct clk *clk_parent;
2021
struct clk *clk;
@@ -89,6 +90,9 @@ static int tegra_output_rgb_enable(struct tegra_output *output)
8990
struct tegra_rgb *rgb = to_rgb(output);
9091
unsigned long value;
9192

93+
if (rgb->enabled)
94+
return 0;
95+
9296
tegra_dc_write_regs(rgb->dc, rgb_enable, ARRAY_SIZE(rgb_enable));
9397

9498
value = DE_SELECT_ACTIVE | DE_CONTROL_NORMAL;
@@ -122,6 +126,8 @@ static int tegra_output_rgb_enable(struct tegra_output *output)
122126
tegra_dc_writel(rgb->dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
123127
tegra_dc_writel(rgb->dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
124128

129+
rgb->enabled = true;
130+
125131
return 0;
126132
}
127133

@@ -130,6 +136,9 @@ static int tegra_output_rgb_disable(struct tegra_output *output)
130136
struct tegra_rgb *rgb = to_rgb(output);
131137
unsigned long value;
132138

139+
if (!rgb->enabled)
140+
return 0;
141+
133142
value = tegra_dc_readl(rgb->dc, DC_CMD_DISPLAY_POWER_CONTROL);
134143
value &= ~(PW0_ENABLE | PW1_ENABLE | PW2_ENABLE | PW3_ENABLE |
135144
PW4_ENABLE | PM0_ENABLE | PM1_ENABLE);
@@ -144,6 +153,8 @@ static int tegra_output_rgb_disable(struct tegra_output *output)
144153

145154
tegra_dc_write_regs(rgb->dc, rgb_disable, ARRAY_SIZE(rgb_disable));
146155

156+
rgb->enabled = false;
157+
147158
return 0;
148159
}
149160

‎drivers/gpu/drm/vmwgfx/svga3d_reg.h

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -261,12 +261,7 @@ typedef enum SVGA3dSurfaceFormat {
261261
/* Planar video formats. */
262262
SVGA3D_YV12 = 121,
263263

264-
/* Shader constant formats. */
265-
SVGA3D_SURFACE_SHADERCONST_FLOAT = 122,
266-
SVGA3D_SURFACE_SHADERCONST_INT = 123,
267-
SVGA3D_SURFACE_SHADERCONST_BOOL = 124,
268-
269-
SVGA3D_FORMAT_MAX = 125,
264+
SVGA3D_FORMAT_MAX = 122,
270265
} SVGA3dSurfaceFormat;
271266

272267
typedef uint32 SVGA3dColor; /* a, r, g, b */

‎drivers/gpu/drm/vmwgfx/vmwgfx_drv.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -40,7 +40,7 @@
4040
#include <drm/ttm/ttm_module.h>
4141
#include "vmwgfx_fence.h"
4242

43-
#define VMWGFX_DRIVER_DATE "20121114"
43+
#define VMWGFX_DRIVER_DATE "20140228"
4444
#define VMWGFX_DRIVER_MAJOR 2
4545
#define VMWGFX_DRIVER_MINOR 5
4646
#define VMWGFX_DRIVER_PATCHLEVEL 0

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