Skip to content

Commit c5b8b5b

Browse files
hikerockiesdavem330
hikerockies
authored and
davem330
committed
sparc64: recognize and support Sonoma CPU type
Add code to recognize SPARC-Sonoma cpu correctly and update cpu hardware caps and cpu distribution map. SPARC-Sonoma is based upon SPARC-M7 core along with additional PCI functions added on and is reported by firmware as "SPARC-SN". Signed-off-by: Khalid Aziz <khalid.aziz@oracle.com> Acked-by: Allen Pais <allen.pais@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
1 parent 5bde2c9 commit c5b8b5b

File tree

6 files changed

+25
-1
lines changed

6 files changed

+25
-1
lines changed

‎arch/sparc/include/asm/spitfire.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -48,6 +48,7 @@
4848
#define SUN4V_CHIP_SPARC_M6 0x06
4949
#define SUN4V_CHIP_SPARC_M7 0x07
5050
#define SUN4V_CHIP_SPARC64X 0x8a
51+
#define SUN4V_CHIP_SPARC_SN 0x8b
5152
#define SUN4V_CHIP_UNKNOWN 0xff
5253

5354
#ifndef __ASSEMBLY__

‎arch/sparc/kernel/cpu.c

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -506,6 +506,12 @@ static void __init sun4v_cpu_probe(void)
506506
sparc_pmu_type = "sparc-m7";
507507
break;
508508

509+
case SUN4V_CHIP_SPARC_SN:
510+
sparc_cpu_type = "SPARC-SN";
511+
sparc_fpu_type = "SPARC-SN integrated FPU";
512+
sparc_pmu_type = "sparc-sn";
513+
break;
514+
509515
case SUN4V_CHIP_SPARC64X:
510516
sparc_cpu_type = "SPARC64-X";
511517
sparc_fpu_type = "SPARC64-X integrated FPU";

‎arch/sparc/kernel/cpumap.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -328,6 +328,7 @@ static int iterate_cpu(struct cpuinfo_tree *t, unsigned int root_index)
328328
case SUN4V_CHIP_NIAGARA5:
329329
case SUN4V_CHIP_SPARC_M6:
330330
case SUN4V_CHIP_SPARC_M7:
331+
case SUN4V_CHIP_SPARC_SN:
331332
case SUN4V_CHIP_SPARC64X:
332333
rover_inc_table = niagara_iterate_method;
333334
break;

‎arch/sparc/kernel/head_64.S

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -414,6 +414,8 @@ sun4v_chip_type:
414414
cmp %g2, 'T'
415415
be,pt %xcc, 70f
416416
cmp %g2, 'M'
417+
be,pt %xcc, 70f
418+
cmp %g2, 'S'
417419
bne,pn %xcc, 49f
418420
nop
419421

@@ -433,6 +435,9 @@ sun4v_chip_type:
433435
cmp %g2, '7'
434436
be,pt %xcc, 5f
435437
mov SUN4V_CHIP_SPARC_M7, %g4
438+
cmp %g2, 'N'
439+
be,pt %xcc, 5f
440+
mov SUN4V_CHIP_SPARC_SN, %g4
436441
ba,pt %xcc, 49f
437442
nop
438443

@@ -595,6 +600,9 @@ niagara_tlb_fixup:
595600
be,pt %xcc, niagara4_patch
596601
nop
597602
cmp %g1, SUN4V_CHIP_SPARC_M7
603+
be,pt %xcc, niagara4_patch
604+
nop
605+
cmp %g1, SUN4V_CHIP_SPARC_SN
598606
be,pt %xcc, niagara4_patch
599607
nop
600608

‎arch/sparc/kernel/setup_64.c

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -285,7 +285,8 @@ static void __init sun4v_patch(void)
285285

286286
sun4v_patch_2insn_range(&__sun4v_2insn_patch,
287287
&__sun4v_2insn_patch_end);
288-
if (sun4v_chip_type == SUN4V_CHIP_SPARC_M7)
288+
if (sun4v_chip_type == SUN4V_CHIP_SPARC_M7 ||
289+
sun4v_chip_type == SUN4V_CHIP_SPARC_SN)
289290
sun_m7_patch_2insn_range(&__sun_m7_2insn_patch,
290291
&__sun_m7_2insn_patch_end);
291292

@@ -524,6 +525,7 @@ static void __init init_sparc64_elf_hwcap(void)
524525
sun4v_chip_type == SUN4V_CHIP_NIAGARA5 ||
525526
sun4v_chip_type == SUN4V_CHIP_SPARC_M6 ||
526527
sun4v_chip_type == SUN4V_CHIP_SPARC_M7 ||
528+
sun4v_chip_type == SUN4V_CHIP_SPARC_SN ||
527529
sun4v_chip_type == SUN4V_CHIP_SPARC64X)
528530
cap |= HWCAP_SPARC_BLKINIT;
529531
if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||
@@ -532,6 +534,7 @@ static void __init init_sparc64_elf_hwcap(void)
532534
sun4v_chip_type == SUN4V_CHIP_NIAGARA5 ||
533535
sun4v_chip_type == SUN4V_CHIP_SPARC_M6 ||
534536
sun4v_chip_type == SUN4V_CHIP_SPARC_M7 ||
537+
sun4v_chip_type == SUN4V_CHIP_SPARC_SN ||
535538
sun4v_chip_type == SUN4V_CHIP_SPARC64X)
536539
cap |= HWCAP_SPARC_N2;
537540
}
@@ -561,6 +564,7 @@ static void __init init_sparc64_elf_hwcap(void)
561564
sun4v_chip_type == SUN4V_CHIP_NIAGARA5 ||
562565
sun4v_chip_type == SUN4V_CHIP_SPARC_M6 ||
563566
sun4v_chip_type == SUN4V_CHIP_SPARC_M7 ||
567+
sun4v_chip_type == SUN4V_CHIP_SPARC_SN ||
564568
sun4v_chip_type == SUN4V_CHIP_SPARC64X)
565569
cap |= (AV_SPARC_VIS | AV_SPARC_VIS2 |
566570
AV_SPARC_ASI_BLK_INIT |
@@ -570,6 +574,7 @@ static void __init init_sparc64_elf_hwcap(void)
570574
sun4v_chip_type == SUN4V_CHIP_NIAGARA5 ||
571575
sun4v_chip_type == SUN4V_CHIP_SPARC_M6 ||
572576
sun4v_chip_type == SUN4V_CHIP_SPARC_M7 ||
577+
sun4v_chip_type == SUN4V_CHIP_SPARC_SN ||
573578
sun4v_chip_type == SUN4V_CHIP_SPARC64X)
574579
cap |= (AV_SPARC_VIS3 | AV_SPARC_HPC |
575580
AV_SPARC_FMAF);

‎arch/sparc/mm/init_64.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1769,6 +1769,7 @@ static void __init setup_page_offset(void)
17691769
max_phys_bits = 47;
17701770
break;
17711771
case SUN4V_CHIP_SPARC_M7:
1772+
case SUN4V_CHIP_SPARC_SN:
17721773
default:
17731774
/* M7 and later support 52-bit virtual addresses. */
17741775
sparc64_va_hole_top = 0xfff8000000000000UL;
@@ -1986,6 +1987,7 @@ static void __init sun4v_linear_pte_xor_finalize(void)
19861987
*/
19871988
switch (sun4v_chip_type) {
19881989
case SUN4V_CHIP_SPARC_M7:
1990+
case SUN4V_CHIP_SPARC_SN:
19891991
pagecv_flag = 0x00;
19901992
break;
19911993
default:
@@ -2138,6 +2140,7 @@ void __init paging_init(void)
21382140
*/
21392141
switch (sun4v_chip_type) {
21402142
case SUN4V_CHIP_SPARC_M7:
2143+
case SUN4V_CHIP_SPARC_SN:
21412144
page_cache4v_flag = _PAGE_CP_4V;
21422145
break;
21432146
default:

0 commit comments

Comments
 (0)