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suryasaimadhuIngo Molnar
suryasaimadhu
authored and
Ingo Molnar
committed
x86: Kill CONFIG_X86_HT
In talking to Aravind recently about making certain AMD topology attributes available to the MCE injection module, it seemed like that CONFIG_X86_HT thing is more or less superfluous. It is def_bool y, depends on SMP and gets enabled in the majority of .configs - distro and otherwise - out there. So let's kill it and make code behind it depend directly on SMP. Signed-off-by: Borislav Petkov <bp@suse.de> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Daniel Walter <dwalter@google.com> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Igor Mammedov <imammedo@redhat.com> Cc: Jacob Shin <jacob.w.shin@gmail.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Mel Gorman <mgorman@suse.de> Cc: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/1433436928-31903-18-git-send-email-bp@alien8.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
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-16
lines changed

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lines changed

‎arch/x86/Kconfig

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -261,10 +261,6 @@ config X86_64_SMP
261261
def_bool y
262262
depends on X86_64 && SMP
263263

264-
config X86_HT
265-
def_bool y
266-
depends on SMP
267-
268264
config X86_32_LAZY_GS
269265
def_bool y
270266
depends on X86_32 && !CC_STACKPROTECTOR
@@ -865,7 +861,7 @@ config NR_CPUS
865861

866862
config SCHED_SMT
867863
bool "SMT (Hyperthreading) scheduler support"
868-
depends on X86_HT
864+
depends on SMP
869865
---help---
870866
SMT scheduler support improves the CPU scheduler's decision making
871867
when dealing with Intel Pentium 4 chips with HyperThreading at a
@@ -875,7 +871,7 @@ config SCHED_SMT
875871
config SCHED_MC
876872
def_bool y
877873
prompt "Multi-core scheduler support"
878-
depends on X86_HT
874+
depends on SMP
879875
---help---
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Multi-core scheduler support improves the CPU scheduler's decision
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making when dealing with multi-core CPU chips at a cost of slightly

‎arch/x86/include/asm/topology.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -26,7 +26,7 @@
2626
#define _ASM_X86_TOPOLOGY_H
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2828
#ifdef CONFIG_X86_32
29-
# ifdef CONFIG_X86_HT
29+
# ifdef CONFIG_SMP
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# define ENABLE_TOPO_DEFINES
3131
# endif
3232
#else

‎arch/x86/kernel/cpu/amd.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -288,7 +288,7 @@ static int nearby_node(int apicid)
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* Assumption: Number of cores in each internal node is the same.
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* (2) AMD processors supporting compute units
290290
*/
291-
#ifdef CONFIG_X86_HT
291+
#ifdef CONFIG_SMP
292292
static void amd_get_topology(struct cpuinfo_x86 *c)
293293
{
294294
u32 nodes, cores_per_cu = 1;
@@ -341,7 +341,7 @@ static void amd_get_topology(struct cpuinfo_x86 *c)
341341
*/
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static void amd_detect_cmp(struct cpuinfo_x86 *c)
343343
{
344-
#ifdef CONFIG_X86_HT
344+
#ifdef CONFIG_SMP
345345
unsigned bits;
346346
int cpu = smp_processor_id();
347347

@@ -420,7 +420,7 @@ static void srat_detect_node(struct cpuinfo_x86 *c)
420420

421421
static void early_init_amd_mc(struct cpuinfo_x86 *c)
422422
{
423-
#ifdef CONFIG_X86_HT
423+
#ifdef CONFIG_SMP
424424
unsigned bits, ecx;
425425

426426
/* Multi core CPU? */

‎arch/x86/kernel/cpu/common.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -508,7 +508,7 @@ static void cpu_detect_tlb(struct cpuinfo_x86 *c)
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509509
void detect_ht(struct cpuinfo_x86 *c)
510510
{
511-
#ifdef CONFIG_X86_HT
511+
#ifdef CONFIG_SMP
512512
u32 eax, ebx, ecx, edx;
513513
int index_msb, core_bits;
514514
static bool printed;
@@ -844,7 +844,7 @@ static void generic_identify(struct cpuinfo_x86 *c)
844844
if (c->cpuid_level >= 0x00000001) {
845845
c->initial_apicid = (cpuid_ebx(1) >> 24) & 0xFF;
846846
#ifdef CONFIG_X86_32
847-
# ifdef CONFIG_X86_HT
847+
# ifdef CONFIG_SMP
848848
c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);
849849
# else
850850
c->apicid = c->initial_apicid;

‎arch/x86/kernel/cpu/intel_cacheinfo.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -654,7 +654,7 @@ unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c)
654654
unsigned int new_l1d = 0, new_l1i = 0; /* Cache sizes from cpuid(4) */
655655
unsigned int new_l2 = 0, new_l3 = 0, i; /* Cache sizes from cpuid(4) */
656656
unsigned int l2_id = 0, l3_id = 0, num_threads_sharing, index_msb;
657-
#ifdef CONFIG_X86_HT
657+
#ifdef CONFIG_SMP
658658
unsigned int cpu = c->cpu_index;
659659
#endif
660660

@@ -773,19 +773,19 @@ unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c)
773773

774774
if (new_l2) {
775775
l2 = new_l2;
776-
#ifdef CONFIG_X86_HT
776+
#ifdef CONFIG_SMP
777777
per_cpu(cpu_llc_id, cpu) = l2_id;
778778
#endif
779779
}
780780

781781
if (new_l3) {
782782
l3 = new_l3;
783-
#ifdef CONFIG_X86_HT
783+
#ifdef CONFIG_SMP
784784
per_cpu(cpu_llc_id, cpu) = l3_id;
785785
#endif
786786
}
787787

788-
#ifdef CONFIG_X86_HT
788+
#ifdef CONFIG_SMP
789789
/*
790790
* If cpu_llc_id is not yet set, this means cpuid_level < 4 which in
791791
* turns means that the only possibility is SMT (as indicated in

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