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Merge tag '64bit-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC 64-bit changes and additions from Olof Johansson: "The 64-bit set of updates this release cycle adds support for three new platforms: - Samsunc Exynos 7 - Freescale LS2085a - Mediatek MT8173 For all these, the changes mostly consititude additions of DT contents, but also some Kconfig entries to allow dependency/selection of drivers per-platform, etc" * tag '64bit-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: arm64: Kconfig: clean up two no-op Kconfig options from CONFIG_ARCH_TEGRA* arm64: Fix sort of platform Kconfig entries arm64: Add support for FSL's LS2085A SoC in Kconfig and defconfig arm64: Add DTS support for FSL's LS2085A SoC arm64: mediatek: Add MT8173 SoC Kconfig and defconfig arm64: dts: Add mediatek MT8173 SoC and evaluation board dts and Makefile Document: DT: Add bindings for mediatek MT8173 SoC Platform arm64: Add Tegra132 support arm64: Enable ARMv8 based exynos7 SoC support arm64: dts: Add nodes for mmc, i2c, rtc, watchdog, adc on exynos7 arm64: dts: Add PMU DT node for exynos7 SoC arm64: dts: Add initial pinctrl support to exynos7 arm64: dts: Add initial device tree support for exynos7
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‎Documentation/devicetree/bindings/arm/mediatek.txt

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@@ -9,6 +9,7 @@ compatible: Must contain one of
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"mediatek,mt6592"
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"mediatek,mt8127"
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"mediatek,mt8135"
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"mediatek,mt8173"
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Supported boards:
@@ -25,3 +26,6 @@ Supported boards:
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- MTK mt8135 tablet EVB:
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Required root node properties:
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- compatible = "mediatek,mt8135-evbp1", "mediatek,mt8135";
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- MTK mt8173 tablet EVB:
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Required root node properties:
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- compatible = "mediatek,mt8173-evb", "mediatek,mt8173";

‎Documentation/devicetree/bindings/arm/mediatek/mediatek,sysirq.txt

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@@ -5,6 +5,7 @@ interrupt.
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Required properties:
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- compatible: should be one of:
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"mediatek,mt8173-sysirq"
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"mediatek,mt8135-sysirq"
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"mediatek,mt8127-sysirq"
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"mediatek,mt6592-sysirq"

‎Documentation/devicetree/bindings/arm/samsung/pmu.txt

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@@ -10,6 +10,7 @@ Properties:
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- "samsung,exynos5260-pmu" - for Exynos5260 SoC.
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- "samsung,exynos5410-pmu" - for Exynos5410 SoC,
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- "samsung,exynos5420-pmu" - for Exynos5420 SoC.
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- "samsung,exynos7-pmu" - for Exynos7 SoC.
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second value must be always "syscon".
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- reg : offset and length of the register set.

‎Documentation/devicetree/bindings/serial/mtk-uart.txt

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@@ -4,9 +4,11 @@ Required properties:
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- compatible should contain:
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* "mediatek,mt8135-uart" for MT8135 compatible UARTS
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* "mediatek,mt8127-uart" for MT8127 compatible UARTS
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* "mediatek,mt8173-uart" for MT8173 compatible UARTS
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* "mediatek,mt6589-uart" for MT6589 compatible UARTS
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* "mediatek,mt6582-uart" for MT6582 compatible UARTS
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* "mediatek,mt6577-uart" for all compatible UARTS (MT6589, MT6582, MT6577)
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* "mediatek,mt6577-uart" for all compatible UARTS (MT8173, MT6589, MT6582,
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MT6577)
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- reg: The base address of the UART register bank.
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‎arch/arm64/Kconfig

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@@ -149,11 +149,65 @@ source "kernel/Kconfig.freezer"
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menu "Platform selection"
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config ARCH_EXYNOS
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bool
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help
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This enables support for Samsung Exynos SoC family
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config ARCH_EXYNOS7
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bool "ARMv8 based Samsung Exynos7"
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select ARCH_EXYNOS
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select COMMON_CLK_SAMSUNG
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select HAVE_S3C2410_WATCHDOG if WATCHDOG
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select HAVE_S3C_RTC if RTC_CLASS
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select PINCTRL
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select PINCTRL_EXYNOS
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help
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This enables support for Samsung Exynos7 SoC family
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config ARCH_FSL_LS2085A
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bool "Freescale LS2085A SOC"
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help
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This enables support for Freescale LS2085A SOC.
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config ARCH_MEDIATEK
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bool "Mediatek MT65xx & MT81xx ARMv8 SoC"
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select ARM_GIC
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help
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Support for Mediatek MT65xx & MT81xx ARMv8 SoCs
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config ARCH_SEATTLE
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bool "AMD Seattle SoC Family"
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help
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This enables support for AMD Seattle SOC Family
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config ARCH_TEGRA
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bool "NVIDIA Tegra SoC Family"
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select ARCH_HAS_RESET_CONTROLLER
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select ARCH_REQUIRE_GPIOLIB
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select CLKDEV_LOOKUP
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select CLKSRC_MMIO
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select CLKSRC_OF
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select GENERIC_CLOCKEVENTS
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select HAVE_CLK
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select PINCTRL
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select RESET_CONTROLLER
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help
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This enables support for the NVIDIA Tegra SoC family.
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config ARCH_TEGRA_132_SOC
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bool "NVIDIA Tegra132 SoC"
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depends on ARCH_TEGRA
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select PINCTRL_TEGRA124
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select USB_ULPI if USB_PHY
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select USB_ULPI_VIEWPORT if USB_PHY
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help
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Enable support for NVIDIA Tegra132 SoC, based on the Denver
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ARMv8 CPU. The Tegra132 SoC is similar to the Tegra124 SoC,
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but contains an NVIDIA Denver CPU complex in place of
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Tegra124's "4+1" Cortex-A15 CPU complex.
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config ARCH_THUNDER
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bool "Cavium Inc. Thunder SoC Family"
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help

‎arch/arm64/boot/dts/Makefile

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@@ -2,5 +2,8 @@ dts-dirs += amd
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dts-dirs += apm
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dts-dirs += arm
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dts-dirs += cavium
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dts-dirs += exynos
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dts-dirs += freescale
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dts-dirs += mediatek
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subdir-y := $(dts-dirs)

‎arch/arm64/boot/dts/exynos/Makefile

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dtb-$(CONFIG_ARCH_EXYNOS7) += exynos7-espresso.dtb
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always := $(dtb-y)
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subdir-y := $(dts-dirs)
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clean-files := *.dtb

‎arch/arm64/boot/dts/exynos/exynos7-espresso.dts

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/*
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* SAMSUNG Exynos7 Espresso board device tree source
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*
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* Copyright (c) 2014 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "exynos7.dtsi"
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/ {
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model = "Samsung Exynos7 Espresso board based on EXYNOS7";
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compatible = "samsung,exynos7-espresso", "samsung,exynos7";
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aliases {
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serial0 = &serial_2;
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mshc0 = &mmc_0;
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mshc2 = &mmc_2;
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};
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chosen {
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linux,stdout-path = &serial_2;
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0x0 0x40000000 0x0 0xC0000000>;
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};
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};
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&fin_pll {
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clock-frequency = <24000000>;
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};
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&serial_2 {
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status = "okay";
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};
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&rtc {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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&adc {
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status = "okay";
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};
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&mmc_0 {
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status = "okay";
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num-slots = <1>;
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broken-cd;
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cap-mmc-highspeed;
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non-removable;
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card-detect-delay = <200>;
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clock-frequency = <800000000>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <0 4>;
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samsung,dw-mshc-ddr-timing = <0 2>;
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pinctrl-names = "default";
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pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4 &sd0_bus8>;
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bus-width = <8>;
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};
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&mmc_2 {
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status = "okay";
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num-slots = <1>;
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cap-sd-highspeed;
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card-detect-delay = <200>;
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clock-frequency = <400000000>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <2 3>;
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samsung,dw-mshc-ddr-timing = <1 2>;
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pinctrl-names = "default";
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pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
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bus-width = <4>;
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disable-wp;
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};

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